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<a href="lpc17xx_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="comment">/**************************************************************************/</span>
<a name="l00026"></a>00026 <span class="preprocessor">#ifndef __LPC17xx_H__</span>
<a name="l00027"></a>00027 <span class="preprocessor"></span><span class="preprocessor">#define __LPC17xx_H__</span>
<a name="l00028"></a>00028 <span class="preprocessor"></span>
<a name="l00029"></a>00029 <span class="comment">/*</span>
<a name="l00030"></a>00030 <span class="comment"> * ==========================================================================</span>
<a name="l00031"></a>00031 <span class="comment"> * ---------- Interrupt Number Definition -----------------------------------</span>
<a name="l00032"></a>00032 <span class="comment"> * ==========================================================================</span>
<a name="l00033"></a>00033 <span class="comment"> */</span>
<a name="l00034"></a>00034 
<a name="l00040"></a><a class="code" href="group___l_p_c17xx___system.html#ga666eb0caeb12ec0e281415592ae89083">00040</a> <span class="keyword">typedef</span> <span class="keyword">enum</span> <a class="code" href="group___l_p_c17xx___system.html#ga666eb0caeb12ec0e281415592ae89083" title="IRQ interrupt source definition.">IRQn</a>
<a name="l00041"></a>00041 {
<a name="l00042"></a>00042 <span class="comment">/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/</span>
<a name="l00043"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ade177d9c70c89e084093024b932a4e30">00043</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a>           = -14,      
<a name="l00044"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a33ff1cf7098de65d61b6354fee6cd5aa">00044</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a33ff1cf7098de65d61b6354fee6cd5aa">MemoryManagement_IRQn</a>         = -12,      
<a name="l00045"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8693500eff174f16119e96234fee73af">00045</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8693500eff174f16119e96234fee73af">BusFault_IRQn</a>                 = -11,      
<a name="l00046"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6895237c9443601ac832efa635dd8bbf">00046</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6895237c9443601ac832efa635dd8bbf">UsageFault_IRQn</a>               = -10,      
<a name="l00047"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4ce820b3cc6cf3a796b41aadc0cf1237">00047</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a>                   = -5,       
<a name="l00048"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8e033fcef7aed98a31c60a7de206722c">00048</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8e033fcef7aed98a31c60a7de206722c">DebugMonitor_IRQn</a>             = -4,       
<a name="l00049"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a03c3cc89984928816d81793fc7bce4a2">00049</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a>                   = -2,       
<a name="l00050"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6dbff8f8543325f3474cbae2446776e7">00050</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a>                  = -1,       
<a name="l00052"></a>00052 <span class="comment">/******  LPC17xx Specific Interrupt Numbers *******************************************************/</span>
<a name="l00053"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a78573b84a4133ef5812b33ce10dcba12">00053</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a78573b84a4133ef5812b33ce10dcba12">WDT_IRQn</a>                      = 0,        
<a name="l00054"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a2336220ce1e39507eb592958064a2b87">00054</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a2336220ce1e39507eb592958064a2b87">TIMER0_IRQn</a>                   = 1,        
<a name="l00055"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0b751a83bbf254701e0d5a1d863010d9">00055</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0b751a83bbf254701e0d5a1d863010d9">TIMER1_IRQn</a>                   = 2,        
<a name="l00056"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad97a34027a8b1017d42d1d6320381e48">00056</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad97a34027a8b1017d42d1d6320381e48">TIMER2_IRQn</a>                   = 3,        
<a name="l00057"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7d15b5c33e51350d11303db7d4bc3381">00057</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7d15b5c33e51350d11303db7d4bc3381">TIMER3_IRQn</a>                   = 4,        
<a name="l00058"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ae9122b85b58f7c24033a8515615a7b74">00058</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ae9122b85b58f7c24033a8515615a7b74">UART0_IRQn</a>                    = 5,        
<a name="l00059"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a9650ab92e46bc16f333d4c63ad0459b4">00059</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a9650ab92e46bc16f333d4c63ad0459b4">UART1_IRQn</a>                    = 6,        
<a name="l00060"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ab051fac6b15b88454713bb36d96e5dd5">00060</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ab051fac6b15b88454713bb36d96e5dd5">UART2_IRQn</a>                    = 7,        
<a name="l00061"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a11614a227a56dc01859bf803013e6358">00061</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a11614a227a56dc01859bf803013e6358">UART3_IRQn</a>                    = 8,        
<a name="l00062"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0cd5b403aa037bacf964fd1a60c3f08f">00062</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0cd5b403aa037bacf964fd1a60c3f08f">PWM1_IRQn</a>                     = 9,        
<a name="l00063"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f1945c7372a6de732306ea3801c8e2a">00063</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f1945c7372a6de732306ea3801c8e2a">I2C0_IRQn</a>                     = 10,       
<a name="l00064"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af651b1769e03e4653b1a4a7c88132398">00064</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af651b1769e03e4653b1a4a7c88132398">I2C1_IRQn</a>                     = 11,       
<a name="l00065"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0e9ff46d0a6311ca3cc43a71702d638d">00065</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0e9ff46d0a6311ca3cc43a71702d638d">I2C2_IRQn</a>                     = 12,       
<a name="l00066"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8f5f99956cf9765f17bcba6865b93ce2">00066</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a8f5f99956cf9765f17bcba6865b93ce2">SPI_IRQn</a>                      = 13,       
<a name="l00067"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6c8d6262fd7ecedc57b2fe9209be9765">00067</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a6c8d6262fd7ecedc57b2fe9209be9765">SSP0_IRQn</a>                     = 14,       
<a name="l00068"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0cfa46f0d13c2de0f3e826c10a789">00068</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0cfa46f0d13c2de0f3e826c10a789">SSP1_IRQn</a>                     = 15,       
<a name="l00069"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7726163ff47c899c26ce68f99eb937a9">00069</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a7726163ff47c899c26ce68f99eb937a9">PLL0_IRQn</a>                     = 16,       
<a name="l00070"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0f2770f7f57f75fac3d8bcac0e858">00070</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083adcc0f2770f7f57f75fac3d8bcac0e858">RTC_IRQn</a>                      = 17,       
<a name="l00071"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0a3db3233549f012f8ecb88f0510adcf">00071</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0a3db3233549f012f8ecb88f0510adcf">EINT0_IRQn</a>                    = 18,       
<a name="l00072"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad855ae101e21a04054a9844066900d7c">00072</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ad855ae101e21a04054a9844066900d7c">EINT1_IRQn</a>                    = 19,       
<a name="l00073"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a40ab356422a691418668d6bbfd9f17b9">00073</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a40ab356422a691418668d6bbfd9f17b9">EINT2_IRQn</a>                    = 20,       
<a name="l00074"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a14098dd2e0d0331c1e5f1f80dde14371">00074</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a14098dd2e0d0331c1e5f1f80dde14371">EINT3_IRQn</a>                    = 21,       
<a name="l00075"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4d69175258ae261dd545001e810421b3">00075</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4d69175258ae261dd545001e810421b3">ADC_IRQn</a>                      = 22,       
<a name="l00076"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ac2ee5960aed41ff349aa7a86c37e9ab2">00076</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083ac2ee5960aed41ff349aa7a86c37e9ab2">BOD_IRQn</a>                      = 23,       
<a name="l00077"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a5078f46ddc47f29eae4aa40bd57d1692">00077</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a5078f46ddc47f29eae4aa40bd57d1692">USB_IRQn</a>                      = 24,       
<a name="l00078"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a20d0bdfa1654b723493895e3ea617cdb">00078</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a20d0bdfa1654b723493895e3ea617cdb">CAN_IRQn</a>                      = 25,       
<a name="l00079"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4968eb85558b7cd25e0f0fa1b839f881">00079</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a4968eb85558b7cd25e0f0fa1b839f881">DMA_IRQn</a>                      = 26,       
<a name="l00080"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a133fe4eabad3ed7b1959daddaace94b3">00080</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a133fe4eabad3ed7b1959daddaace94b3">I2S_IRQn</a>                      = 27,       
<a name="l00081"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af3a2a999d58e47ed39ed1bd9c877aee6">00081</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083af3a2a999d58e47ed39ed1bd9c877aee6">ENET_IRQn</a>                     = 28,       
<a name="l00082"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a075f80f900f31c166defe2a4aef99e77">00082</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a075f80f900f31c166defe2a4aef99e77">RIT_IRQn</a>                      = 29,       
<a name="l00083"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a66a11398b7cc13d7c525945b0a86a2f0">00083</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a66a11398b7cc13d7c525945b0a86a2f0">MCPWM_IRQn</a>                    = 30,       
<a name="l00084"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a82471ba65527ad3f3da8af38acb953bf">00084</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a82471ba65527ad3f3da8af38acb953bf">QEI_IRQn</a>                      = 31,       
<a name="l00085"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f0e46a33c20be148ef16fe7ed4dcd4b">00085</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a0f0e46a33c20be148ef16fe7ed4dcd4b">PLL1_IRQn</a>                     = 32,       
<a name="l00086"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083aa3c495fabd97a50818dc748f738c71e7">00086</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083aa3c495fabd97a50818dc748f738c71e7">USBActivity_IRQn</a>                              = 33,           
<a name="l00087"></a><a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a25ef61f3d4a0d5f2bcf0525702b872b7">00087</a>   <a class="code" href="group___l_p_c17xx___system.html#gga666eb0caeb12ec0e281415592ae89083a25ef61f3d4a0d5f2bcf0525702b872b7">CANActivity_IRQn</a>                              = 34,           
<a name="l00088"></a>00088 } <a class="code" href="group___l_p_c17xx___system.html#gac3af4a32370fb28c4ade8bf2add80251" title="IRQ interrupt source definition.">IRQn_Type</a>;
<a name="l00089"></a>00089 
<a name="l00090"></a>00090 
<a name="l00091"></a>00091 <span class="comment">/*</span>
<a name="l00092"></a>00092 <span class="comment"> * ==========================================================================</span>
<a name="l00093"></a>00093 <span class="comment"> * ----------- Processor and Core Peripheral Section ------------------------</span>
<a name="l00094"></a>00094 <span class="comment"> * ==========================================================================</span>
<a name="l00095"></a>00095 <span class="comment"> */</span>
<a name="l00096"></a>00096 
<a name="l00097"></a>00097 <span class="comment">/* Configuration of the Cortex-M3 Processor and Core Peripherals */</span>
<a name="l00098"></a><a class="code" href="group___l_p_c17xx___system.html#ga4127d1b31aaf336fab3d7329d117f448">00098</a> <span class="preprocessor">#define __MPU_PRESENT             1         </span>
<a name="l00099"></a><a class="code" href="group___l_p_c17xx___system.html#gae3fe3587d5100c787e02102ce3944460">00099</a> <span class="preprocessor">#define __NVIC_PRIO_BITS          5         </span>
<a name="l00100"></a><a class="code" href="group___l_p_c17xx___system.html#gab58771b4ec03f9bdddc84770f7c95c68">00100</a> <span class="preprocessor">#define __Vendor_SysTickConfig    0         </span>
<a name="l00103"></a>00103 <span class="preprocessor">#include &quot;core_cm3.h&quot;                       </span><span class="comment">/* Cortex-M3 processor and core peripherals           */</span>
<a name="l00104"></a>00104 <span class="preprocessor">#include &quot;<a class="code" href="system___l_p_c17xx_8h.html" title="CMSIS Cortex-M3 Device Peripheral Access Layer Header File for the NXP LPC17xx Device Series...">system_LPC17xx.h</a>&quot;</span>                 <span class="comment">/* System Header                                      */</span>
<a name="l00105"></a>00105 
<a name="l00106"></a>00106 
<a name="l00107"></a>00107 <span class="comment">/******************************************************************************/</span>
<a name="l00108"></a>00108 <span class="comment">/*                Device Specific Peripheral registers structures             */</span>
<a name="l00109"></a>00109 <span class="comment">/******************************************************************************/</span>
<a name="l00110"></a>00110 
<a name="l00111"></a>00111 <span class="preprocessor">#if defined ( __CC_ARM   )</span>
<a name="l00112"></a>00112 <span class="preprocessor"></span><span class="preprocessor">#pragma anon_unions</span>
<a name="l00113"></a>00113 <span class="preprocessor"></span><span class="preprocessor">#endif</span>
<a name="l00114"></a>00114 <span class="preprocessor"></span>
<a name="l00115"></a>00115 <span class="comment">/*------------- System Control (SC) ------------------------------------------*/</span>
<a name="l00117"></a><a class="code" href="struct_l_p_c___s_c___type_def.html">00117</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00118"></a>00118 {
<a name="l00119"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ad7b9da8772f01f3ecca6abd97625a80f">00119</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ad7b9da8772f01f3ecca6abd97625a80f">FLASHCFG</a>;               <span class="comment">/* Flash Accelerator Module           */</span>
<a name="l00120"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a8e0fd99318a2d51748f6546c40e7b563">00120</a>        uint32_t RESERVED0[31];
<a name="l00121"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ae75e4960a5e1d70b912d93a3d9dd3193">00121</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ae75e4960a5e1d70b912d93a3d9dd3193">PLL0CON</a>;                <span class="comment">/* Clocking and Power Control         */</span>
<a name="l00122"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a8793cd1c3649849b126253e8567c9138">00122</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a8793cd1c3649849b126253e8567c9138">PLL0CFG</a>;
<a name="l00123"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a93ce12cb449f3c327553dbab596c9bc5">00123</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a93ce12cb449f3c327553dbab596c9bc5">PLL0STAT</a>;
<a name="l00124"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#acdafef0cdd425361238c459db34dd810">00124</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#acdafef0cdd425361238c459db34dd810">PLL0FEED</a>;
<a name="l00125"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a142c9c410f0776ac5a9cefe1d5e9ee82">00125</a>        uint32_t RESERVED1[4];
<a name="l00126"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#aeadf4a0049ea8f39ad5144146385fe32">00126</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#aeadf4a0049ea8f39ad5144146385fe32">PLL1CON</a>;
<a name="l00127"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a12e98febef8928ec39fe5963eb8c1509">00127</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a12e98febef8928ec39fe5963eb8c1509">PLL1CFG</a>;
<a name="l00128"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a00d9e4d1bf9425f8310d458bf0b166e8">00128</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a00d9e4d1bf9425f8310d458bf0b166e8">PLL1STAT</a>;
<a name="l00129"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#af6c3319c7cad9a705520c6e205ba62e5">00129</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#af6c3319c7cad9a705520c6e205ba62e5">PLL1FEED</a>;
<a name="l00130"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a81fd5567769ff37fe5415ec07bbc49e8">00130</a>        uint32_t RESERVED2[4];
<a name="l00131"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a661570acbb7e8c549780c3cf9a74e0e4">00131</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a661570acbb7e8c549780c3cf9a74e0e4">PCON</a>;
<a name="l00132"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a1858001ba97e3934cee0bdfc33f16959">00132</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a1858001ba97e3934cee0bdfc33f16959">PCONP</a>;
<a name="l00133"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ae423bfdf33de2ea309d0b9ccaed862f3">00133</a>        uint32_t RESERVED3[15];
<a name="l00134"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a0f53797274f2a1fa43da8a1ec3d98c33">00134</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a0f53797274f2a1fa43da8a1ec3d98c33">CCLKCFG</a>;
<a name="l00135"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#aadcbecdb94b9dd38b707365c0e2a5056">00135</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#aadcbecdb94b9dd38b707365c0e2a5056">USBCLKCFG</a>;
<a name="l00136"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a8dcd0dd0fc85a2a6370a46fa65e851ee">00136</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a8dcd0dd0fc85a2a6370a46fa65e851ee">CLKSRCSEL</a>;
<a name="l00137"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a360e7a10db3b4a35777f97a65e7a7fe2">00137</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a360e7a10db3b4a35777f97a65e7a7fe2">CANSLEEPCLR</a>;
<a name="l00138"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a907def49bd3587a5261aac321bd2ca80">00138</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a907def49bd3587a5261aac321bd2ca80">CANWAKEFLAGS</a>;
<a name="l00139"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a52633bb3c0f9ec0af687b9577d760593">00139</a>        uint32_t RESERVED4[10];
<a name="l00140"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a3cefb20190df3a39bfe353aa7ffbff35">00140</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a3cefb20190df3a39bfe353aa7ffbff35">EXTINT</a>;                 <span class="comment">/* External Interrupts                */</span>
<a name="l00141"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a010d62aa63a572fc627a0614f8fd46fb">00141</a>        uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a010d62aa63a572fc627a0614f8fd46fb">RESERVED5</a>;
<a name="l00142"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#adec4ea2d72d5e85c19a632b5449a6d5a">00142</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#adec4ea2d72d5e85c19a632b5449a6d5a">EXTMODE</a>;
<a name="l00143"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a969f6ecc348c0932af9cdf757dd37acd">00143</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a969f6ecc348c0932af9cdf757dd37acd">EXTPOLAR</a>;
<a name="l00144"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a1242c4cb262a530ddb6014803178daa9">00144</a>        uint32_t RESERVED6[12];
<a name="l00145"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ae36341edb8867121c822553ff40befb4">00145</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ae36341edb8867121c822553ff40befb4">RSID</a>;                   <span class="comment">/* Reset                              */</span>
<a name="l00146"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a2b14f5367d0359d227519edb23d84175">00146</a>        uint32_t RESERVED7[7];
<a name="l00147"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ac96ef5d474b2033cdfb8dac1cb1cb513">00147</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ac96ef5d474b2033cdfb8dac1cb1cb513">SCS</a>;                    <span class="comment">/* Syscon Miscellaneous Registers     */</span>
<a name="l00148"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#af794542fae0b4bee6d51259d867b4d01">00148</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#af794542fae0b4bee6d51259d867b4d01">IRCTRIM</a>;                <span class="comment">/* Clock Dividers                     */</span>
<a name="l00149"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ad1c5b054f43593854869578cac235768">00149</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ad1c5b054f43593854869578cac235768">PCLKSEL0</a>;
<a name="l00150"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#ac0613aa8717793b24a6556184b1afee4">00150</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#ac0613aa8717793b24a6556184b1afee4">PCLKSEL1</a>;
<a name="l00151"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a8d4c5b60ddebbd454ec9d015d4ff9b72">00151</a>        uint32_t RESERVED8[4];
<a name="l00152"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a5590a260eb4d547a84c32498862c04b7">00152</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a5590a260eb4d547a84c32498862c04b7">USBIntSt</a>;               <span class="comment">/* USB Device/OTG Interrupt Register  */</span>
<a name="l00153"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#af3d37f98e345ed9c1dcf42f7bc3927eb">00153</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#af3d37f98e345ed9c1dcf42f7bc3927eb">DMAREQSEL</a>;
<a name="l00154"></a><a class="code" href="struct_l_p_c___s_c___type_def.html#a848ba26aa2608fc911578e16386b8dff">00154</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_c___type_def.html#a848ba26aa2608fc911578e16386b8dff">CLKOUTCFG</a>;              <span class="comment">/* Clock Output Configuration         */</span>
<a name="l00155"></a>00155  } <a class="code" href="struct_l_p_c___s_c___type_def.html" title="System Control (SC) register structure definition.">LPC_SC_TypeDef</a>;
<a name="l00156"></a>00156 
<a name="l00157"></a>00157 <span class="comment">/*------------- Pin Connect Block (PINCON) -----------------------------------*/</span>
<a name="l00159"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html">00159</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00160"></a>00160 {
<a name="l00161"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5ec930a00f9376c448cb67b83b5eacb7">00161</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5ec930a00f9376c448cb67b83b5eacb7">PINSEL0</a>;
<a name="l00162"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a254f1753d52956a4cb0dda0ea40ca401">00162</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a254f1753d52956a4cb0dda0ea40ca401">PINSEL1</a>;
<a name="l00163"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae6aaae54118c25b1c093b2895c5a7b99">00163</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae6aaae54118c25b1c093b2895c5a7b99">PINSEL2</a>;
<a name="l00164"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a8bc76a2cb0120314a2e57c0b54c642c2">00164</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a8bc76a2cb0120314a2e57c0b54c642c2">PINSEL3</a>;
<a name="l00165"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#afe20ffbd71706b874785b1ed434b36f5">00165</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#afe20ffbd71706b874785b1ed434b36f5">PINSEL4</a>;
<a name="l00166"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a54ff6d15e65f3d6c27d9291b8735a4d2">00166</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a54ff6d15e65f3d6c27d9291b8735a4d2">PINSEL5</a>;
<a name="l00167"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ad8736d6ea846fe3fb4e581b457503853">00167</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ad8736d6ea846fe3fb4e581b457503853">PINSEL6</a>;
<a name="l00168"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a489b3e47c08fb0ef5a3c40ab7c3945a3">00168</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a489b3e47c08fb0ef5a3c40ab7c3945a3">PINSEL7</a>;
<a name="l00169"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a3a6412bb0a4ad5984d83e5159208ac97">00169</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a3a6412bb0a4ad5984d83e5159208ac97">PINSEL8</a>;
<a name="l00170"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae5e731635c963ff61adae4a965f4e9e4">00170</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae5e731635c963ff61adae4a965f4e9e4">PINSEL9</a>;
<a name="l00171"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a2bfe765fbf658333a8482ce776acd72b">00171</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a2bfe765fbf658333a8482ce776acd72b">PINSEL10</a>;
<a name="l00172"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#aca308efb628054ab6d740646aba7d23c">00172</a>        uint32_t RESERVED0[5];
<a name="l00173"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#aef1c19a6a1a5124c5900b60c684ebe5a">00173</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#aef1c19a6a1a5124c5900b60c684ebe5a">PINMODE0</a>;
<a name="l00174"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a58b2ff4d3bc78b47c06627bac215e791">00174</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a58b2ff4d3bc78b47c06627bac215e791">PINMODE1</a>;
<a name="l00175"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a25d99a90c57dbfdf0c590895ade91385">00175</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a25d99a90c57dbfdf0c590895ade91385">PINMODE2</a>;
<a name="l00176"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ab11c318f58080bb8c7114f011f8e844c">00176</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ab11c318f58080bb8c7114f011f8e844c">PINMODE3</a>;
<a name="l00177"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a203af89e188ad019954f584cfe8b31b0">00177</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a203af89e188ad019954f584cfe8b31b0">PINMODE4</a>;
<a name="l00178"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a096860d71417af2bc616f175488c15e1">00178</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a096860d71417af2bc616f175488c15e1">PINMODE5</a>;
<a name="l00179"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a1dfbb5c4b423bc512a601467c917f653">00179</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a1dfbb5c4b423bc512a601467c917f653">PINMODE6</a>;
<a name="l00180"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a37521053cf32b3d8c5ba7f39d9d1e764">00180</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a37521053cf32b3d8c5ba7f39d9d1e764">PINMODE7</a>;
<a name="l00181"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae470e1df56d5eaa7a0f216531b6e465c">00181</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ae470e1df56d5eaa7a0f216531b6e465c">PINMODE8</a>;
<a name="l00182"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5a5ba7aa7e81abd3ddb312066aa7ab18">00182</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5a5ba7aa7e81abd3ddb312066aa7ab18">PINMODE9</a>;
<a name="l00183"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5e995e337a0a89b201a8b213bf3725de">00183</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a5e995e337a0a89b201a8b213bf3725de">PINMODE_OD0</a>;
<a name="l00184"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a52c4234993cd3aa45c009dc70725158c">00184</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a52c4234993cd3aa45c009dc70725158c">PINMODE_OD1</a>;
<a name="l00185"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a94d763bd4b3a4df7b002a11935f31dfe">00185</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a94d763bd4b3a4df7b002a11935f31dfe">PINMODE_OD2</a>;
<a name="l00186"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a56edcc0d31e729815309973d51625186">00186</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a56edcc0d31e729815309973d51625186">PINMODE_OD3</a>;
<a name="l00187"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a828f895d55b40a005599ae485b90800b">00187</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#a828f895d55b40a005599ae485b90800b">PINMODE_OD4</a>;
<a name="l00188"></a><a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ab31a22fdc19423a35a7e9862b60db3ce">00188</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html#ab31a22fdc19423a35a7e9862b60db3ce">I2CPADCFG</a>;
<a name="l00189"></a>00189 } <a class="code" href="struct_l_p_c___p_i_n_c_o_n___type_def.html" title="Pin Connect Block (PINCON) register structure definition.">LPC_PINCON_TypeDef</a>;
<a name="l00190"></a>00190 
<a name="l00191"></a>00191 <span class="comment">/*------------- General Purpose Input/Output (GPIO) --------------------------*/</span>
<a name="l00193"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html">00193</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00194"></a>00194 {
<a name="l00195"></a>00195   <span class="keyword">union </span>{
<a name="l00196"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a2a8100863a03a42ab7400a7c8a0b5520">00196</a>     <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a2a8100863a03a42ab7400a7c8a0b5520">FIODIR</a>;
<a name="l00197"></a>00197     <span class="keyword">struct </span>{
<a name="l00198"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a84e3958c11129de40e9d5561fbe928fc">00198</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a84e3958c11129de40e9d5561fbe928fc">FIODIRL</a>;
<a name="l00199"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a97f7d1dface0f4fd930b560547aae095">00199</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a97f7d1dface0f4fd930b560547aae095">FIODIRH</a>;
<a name="l00200"></a>00200     };
<a name="l00201"></a>00201     <span class="keyword">struct </span>{
<a name="l00202"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a1b2ca3b8b8c49ff669f5989e2164a654">00202</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a1b2ca3b8b8c49ff669f5989e2164a654">FIODIR0</a>;
<a name="l00203"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a523566177798276dcf17da4df2f294a3">00203</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a523566177798276dcf17da4df2f294a3">FIODIR1</a>;
<a name="l00204"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ac6507c3827df6f6b60b49c943c1250f3">00204</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ac6507c3827df6f6b60b49c943c1250f3">FIODIR2</a>;
<a name="l00205"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#af6c5005a16eef44eaf2f084ed55cdfb8">00205</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#af6c5005a16eef44eaf2f084ed55cdfb8">FIODIR3</a>;
<a name="l00206"></a>00206     };
<a name="l00207"></a>00207   };
<a name="l00208"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a153fade589fd40270df4beb194fe0344">00208</a>   uint32_t RESERVED0[3];
<a name="l00209"></a>00209   <span class="keyword">union </span>{
<a name="l00210"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa015c92a4e36d26937e6eeaafffbe735">00210</a>     <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa015c92a4e36d26937e6eeaafffbe735">FIOMASK</a>;
<a name="l00211"></a>00211     <span class="keyword">struct </span>{
<a name="l00212"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ad25725b551571232fc259928d44bd2bc">00212</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ad25725b551571232fc259928d44bd2bc">FIOMASKL</a>;
<a name="l00213"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a8c0f797989d65fdba8480bab31061989">00213</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a8c0f797989d65fdba8480bab31061989">FIOMASKH</a>;
<a name="l00214"></a>00214     };
<a name="l00215"></a>00215     <span class="keyword">struct </span>{
<a name="l00216"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a150977f0998b9db31e333857256f8198">00216</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a150977f0998b9db31e333857256f8198">FIOMASK0</a>;
<a name="l00217"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a7f511671148e433b7b09316828377f54">00217</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a7f511671148e433b7b09316828377f54">FIOMASK1</a>;
<a name="l00218"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a1d0685bee6bc910d479783bb09fc78a9">00218</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a1d0685bee6bc910d479783bb09fc78a9">FIOMASK2</a>;
<a name="l00219"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa92633ce30476dceb87b1dbec856893d">00219</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa92633ce30476dceb87b1dbec856893d">FIOMASK3</a>;
<a name="l00220"></a>00220     };
<a name="l00221"></a>00221   };
<a name="l00222"></a>00222   <span class="keyword">union </span>{
<a name="l00223"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aee9fe0d81dd565c9a94b24adad222e2b">00223</a>     <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aee9fe0d81dd565c9a94b24adad222e2b">FIOPIN</a>;
<a name="l00224"></a>00224     <span class="keyword">struct </span>{
<a name="l00225"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ab408d8d1355a0eee84887594c56f08af">00225</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ab408d8d1355a0eee84887594c56f08af">FIOPINL</a>;
<a name="l00226"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a68019a1876df59960072c13f5bd9cf72">00226</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a68019a1876df59960072c13f5bd9cf72">FIOPINH</a>;
<a name="l00227"></a>00227     };
<a name="l00228"></a>00228     <span class="keyword">struct </span>{
<a name="l00229"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a97653cc6143b4db923c34bfebdc04b92">00229</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a97653cc6143b4db923c34bfebdc04b92">FIOPIN0</a>;
<a name="l00230"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#abd9e3d2f429580e1d7f1710956d743f9">00230</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#abd9e3d2f429580e1d7f1710956d743f9">FIOPIN1</a>;
<a name="l00231"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a08f04c2e83d8b2834ab3da12f44baf41">00231</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a08f04c2e83d8b2834ab3da12f44baf41">FIOPIN2</a>;
<a name="l00232"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a517aadbdd5fcd75e4df4534e97a91f94">00232</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a517aadbdd5fcd75e4df4534e97a91f94">FIOPIN3</a>;
<a name="l00233"></a>00233     };
<a name="l00234"></a>00234   };
<a name="l00235"></a>00235   <span class="keyword">union </span>{
<a name="l00236"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a7353851280dacee2aa646fff26f0852e">00236</a>     <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a7353851280dacee2aa646fff26f0852e">FIOSET</a>;
<a name="l00237"></a>00237     <span class="keyword">struct </span>{
<a name="l00238"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a534316a1a2fe443f99700d2dc4a2fbea">00238</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a534316a1a2fe443f99700d2dc4a2fbea">FIOSETL</a>;
<a name="l00239"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa6770bb087a4151525d8486b75810ba4">00239</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aa6770bb087a4151525d8486b75810ba4">FIOSETH</a>;
<a name="l00240"></a>00240     };
<a name="l00241"></a>00241     <span class="keyword">struct </span>{
<a name="l00242"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a86d2b104baa102575e2fef78c3371853">00242</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a86d2b104baa102575e2fef78c3371853">FIOSET0</a>;
<a name="l00243"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a93416c5158b6d1ba3569cb1b132627df">00243</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a93416c5158b6d1ba3569cb1b132627df">FIOSET1</a>;
<a name="l00244"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aef78b3408b2aa9420f9bbfe98da91538">00244</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aef78b3408b2aa9420f9bbfe98da91538">FIOSET2</a>;
<a name="l00245"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9bb0ccfb09cf4fbd3ee4ab080bdb5a07">00245</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9bb0ccfb09cf4fbd3ee4ab080bdb5a07">FIOSET3</a>;
<a name="l00246"></a>00246     };
<a name="l00247"></a>00247   };
<a name="l00248"></a>00248   <span class="keyword">union </span>{
<a name="l00249"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#adaa1ee82b7dfb7cbeaa41ca11cbb4a25">00249</a>     <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#adaa1ee82b7dfb7cbeaa41ca11cbb4a25">FIOCLR</a>;
<a name="l00250"></a>00250     <span class="keyword">struct </span>{
<a name="l00251"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ae388daafe7a53bb40e3b46cc353f783e">00251</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#ae388daafe7a53bb40e3b46cc353f783e">FIOCLRL</a>;
<a name="l00252"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#af752c5016e4ea45235affc90afef6d6c">00252</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint16_t <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#af752c5016e4ea45235affc90afef6d6c">FIOCLRH</a>;
<a name="l00253"></a>00253     };
<a name="l00254"></a>00254     <span class="keyword">struct </span>{
<a name="l00255"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9b0742e970731100d80bb2f88fed2ea8">00255</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9b0742e970731100d80bb2f88fed2ea8">FIOCLR0</a>;
<a name="l00256"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9b763588875f6dc2177cc2a643cf59b6">00256</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#a9b763588875f6dc2177cc2a643cf59b6">FIOCLR1</a>;
<a name="l00257"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#adb1fc9ab3b2fbf405249d6256285abe5">00257</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#adb1fc9ab3b2fbf405249d6256285abe5">FIOCLR2</a>;
<a name="l00258"></a><a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aeaa956f5de4442c0436497c419204f35">00258</a>       <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html#aeaa956f5de4442c0436497c419204f35">FIOCLR3</a>;
<a name="l00259"></a>00259     };
<a name="l00260"></a>00260   };
<a name="l00261"></a>00261 } <a class="code" href="struct_l_p_c___g_p_i_o___type_def.html" title="General Purpose Input/Output (GPIO) register structure definition.">LPC_GPIO_TypeDef</a>;
<a name="l00262"></a>00262 
<a name="l00264"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html">00264</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00265"></a>00265 {
<a name="l00266"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#afa4872f0a2ecebbd18074d6100eff854">00266</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#afa4872f0a2ecebbd18074d6100eff854">IntStatus</a>;
<a name="l00267"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a908d1492ca624b64820a22eae4820ab7">00267</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a908d1492ca624b64820a22eae4820ab7">IO0IntStatR</a>;
<a name="l00268"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a41ebe7e578f712d9bca8ce940715d2fd">00268</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a41ebe7e578f712d9bca8ce940715d2fd">IO0IntStatF</a>;
<a name="l00269"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a8403a2d96791a9fe05a0a2bb15b9a5a3">00269</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a8403a2d96791a9fe05a0a2bb15b9a5a3">IO0IntClr</a>;
<a name="l00270"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a5164ca7a88fb967b287d0d7965d1b8e6">00270</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a5164ca7a88fb967b287d0d7965d1b8e6">IO0IntEnR</a>;
<a name="l00271"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a863a5e903f86573d7055a3bc556fdb8e">00271</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a863a5e903f86573d7055a3bc556fdb8e">IO0IntEnF</a>;
<a name="l00272"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a30c5656ec060ec3a66144a898c617b14">00272</a>        uint32_t RESERVED0[3];
<a name="l00273"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a3ff6df7dfc2b6f87b8632eb91ba5f8ab">00273</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a3ff6df7dfc2b6f87b8632eb91ba5f8ab">IO2IntStatR</a>;
<a name="l00274"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a47babfbe052441ddac928c91560e3606">00274</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a47babfbe052441ddac928c91560e3606">IO2IntStatF</a>;
<a name="l00275"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a1ee47557eb72e360ac71633b72d510cb">00275</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a1ee47557eb72e360ac71633b72d510cb">IO2IntClr</a>;
<a name="l00276"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a3a443b7e903e36f890aad5b392cfe759">00276</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a3a443b7e903e36f890aad5b392cfe759">IO2IntEnR</a>;
<a name="l00277"></a><a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a6ec2f354e0d7e401afc4d783f21f321d">00277</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html#a6ec2f354e0d7e401afc4d783f21f321d">IO2IntEnF</a>;
<a name="l00278"></a>00278 } <a class="code" href="struct_l_p_c___g_p_i_o_i_n_t___type_def.html" title="General Purpose Input/Output interrupt (GPIOINT) register structure definition.">LPC_GPIOINT_TypeDef</a>;
<a name="l00279"></a>00279 
<a name="l00280"></a>00280 <span class="comment">/*------------- Timer (TIM) --------------------------------------------------*/</span>
<a name="l00282"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html">00282</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00283"></a>00283 {
<a name="l00284"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a4c96cc8faf466faf959a22de39e80c0e">00284</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a4c96cc8faf466faf959a22de39e80c0e">IR</a>;
<a name="l00285"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a749720c431746c0e08fa59c2ebb1ca26">00285</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a749720c431746c0e08fa59c2ebb1ca26">TCR</a>;
<a name="l00286"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a2d70cc897d39c22a04328fc329790fa2">00286</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a2d70cc897d39c22a04328fc329790fa2">TC</a>;
<a name="l00287"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#afb73bd0a29f62603c2c88feffd0f97e2">00287</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#afb73bd0a29f62603c2c88feffd0f97e2">PR</a>;
<a name="l00288"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#ae9ca163001bce16366eb455e09ab251e">00288</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#ae9ca163001bce16366eb455e09ab251e">PC</a>;
<a name="l00289"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#ae0a736fa03d1372de649065db757293e">00289</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#ae0a736fa03d1372de649065db757293e">MCR</a>;
<a name="l00290"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a2e2a1b22f0a76479a69a33639295c80b">00290</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a2e2a1b22f0a76479a69a33639295c80b">MR0</a>;
<a name="l00291"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#ab40a707ac932d071b85eac4f4765d1bb">00291</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#ab40a707ac932d071b85eac4f4765d1bb">MR1</a>;
<a name="l00292"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a3f44977957876de84f42efddfa033b95">00292</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a3f44977957876de84f42efddfa033b95">MR2</a>;
<a name="l00293"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a99f776079984defd83b9a11d87c86100">00293</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a99f776079984defd83b9a11d87c86100">MR3</a>;
<a name="l00294"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a5c30622954dacacdef69677e99715ba8">00294</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a5c30622954dacacdef69677e99715ba8">CCR</a>;
<a name="l00295"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#ac1898b68aa5de6ad299a3feea84b628e">00295</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#ac1898b68aa5de6ad299a3feea84b628e">CR0</a>;
<a name="l00296"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a63b245f5a286c88b6dd006cc5054be2f">00296</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a63b245f5a286c88b6dd006cc5054be2f">CR1</a>;
<a name="l00297"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a3e38bb184d8223f0f99f9534c1b7bb19">00297</a>        uint32_t RESERVED0[2];
<a name="l00298"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#ad094765dc5720a2333d56dc17e14c4fc">00298</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#ad094765dc5720a2333d56dc17e14c4fc">EMR</a>;
<a name="l00299"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a52cad77d7054e9043968f92dc7715662">00299</a>        uint32_t RESERVED1[12];
<a name="l00300"></a><a class="code" href="struct_l_p_c___t_i_m___type_def.html#a28ac125deeebbe8c288a35586e5fa455">00300</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___t_i_m___type_def.html#a28ac125deeebbe8c288a35586e5fa455">CTCR</a>;
<a name="l00301"></a>00301 } <a class="code" href="struct_l_p_c___t_i_m___type_def.html" title="Timer (TIM) register structure definition.">LPC_TIM_TypeDef</a>;
<a name="l00302"></a>00302 
<a name="l00303"></a>00303 <span class="comment">/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/</span>
<a name="l00305"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html">00305</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00306"></a>00306 {
<a name="l00307"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a9811eb5738e52f3b1a11ddff49bbdc78">00307</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a9811eb5738e52f3b1a11ddff49bbdc78">IR</a>;
<a name="l00308"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a9b55e114f9f96123677ed8a89d147be7">00308</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a9b55e114f9f96123677ed8a89d147be7">TCR</a>;
<a name="l00309"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#addc3a8bbc412879ee9681c28d2b2ef5c">00309</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#addc3a8bbc412879ee9681c28d2b2ef5c">TC</a>;
<a name="l00310"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a7b4fe1c22c66694348c1e75dd817afd6">00310</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a7b4fe1c22c66694348c1e75dd817afd6">PR</a>;
<a name="l00311"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#afc34e1b610676c8cf5255efe1faf2770">00311</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#afc34e1b610676c8cf5255efe1faf2770">PC</a>;
<a name="l00312"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a0c3e4663051f5c6885cb8562346aa282">00312</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a0c3e4663051f5c6885cb8562346aa282">MCR</a>;
<a name="l00313"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a58251279238261260aeba4cdfb095015">00313</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a58251279238261260aeba4cdfb095015">MR0</a>;
<a name="l00314"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a3ff2ff273b161855cf4f35d198267a04">00314</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a3ff2ff273b161855cf4f35d198267a04">MR1</a>;
<a name="l00315"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae229456aab8044466975b2e46ae1a6a7">00315</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae229456aab8044466975b2e46ae1a6a7">MR2</a>;
<a name="l00316"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#ad00f47156236f82677d9d7cdb6af7105">00316</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#ad00f47156236f82677d9d7cdb6af7105">MR3</a>;
<a name="l00317"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#af4dccc1d2c7d44f065140cd22bb5495c">00317</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#af4dccc1d2c7d44f065140cd22bb5495c">CCR</a>;
<a name="l00318"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a470331ca96fcd1249b8e462e5e1244b9">00318</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a470331ca96fcd1249b8e462e5e1244b9">CR0</a>;
<a name="l00319"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#ac631f276eb885dc600e35f242bbcea6d">00319</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#ac631f276eb885dc600e35f242bbcea6d">CR1</a>;
<a name="l00320"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae375534290529f8780fe3b772f9e3f62">00320</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae375534290529f8780fe3b772f9e3f62">CR2</a>;
<a name="l00321"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a4acc3764ab2d86b46968a1c3a94f9cfb">00321</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a4acc3764ab2d86b46968a1c3a94f9cfb">CR3</a>;
<a name="l00322"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a961bdcf0331e78ad70c8d16e444e962c">00322</a>        uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a961bdcf0331e78ad70c8d16e444e962c">RESERVED0</a>;
<a name="l00323"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae90ffca378aac822c16662c2ae7f50fe">00323</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#ae90ffca378aac822c16662c2ae7f50fe">MR4</a>;
<a name="l00324"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a7bdc029656bf2fd1a7e7d90bd82f2574">00324</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a7bdc029656bf2fd1a7e7d90bd82f2574">MR5</a>;
<a name="l00325"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#afca7a9ad44bffca861a84612d7b28fde">00325</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#afca7a9ad44bffca861a84612d7b28fde">MR6</a>;
<a name="l00326"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a69da14fcc7307263f9619e7a41b66eac">00326</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a69da14fcc7307263f9619e7a41b66eac">PCR</a>;
<a name="l00327"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a66870e1624cc34e666a6028d4b90bd1c">00327</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a66870e1624cc34e666a6028d4b90bd1c">LER</a>;
<a name="l00328"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a0a4b673db3962be444e0445e06401519">00328</a>        uint32_t RESERVED1[7];
<a name="l00329"></a><a class="code" href="struct_l_p_c___p_w_m___type_def.html#a0356b1c1af3a9e2d8e093f3f8d5ac02d">00329</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___p_w_m___type_def.html#a0356b1c1af3a9e2d8e093f3f8d5ac02d">CTCR</a>;
<a name="l00330"></a>00330 } <a class="code" href="struct_l_p_c___p_w_m___type_def.html" title="Pulse-Width Modulation (PWM) register structure definition.">LPC_PWM_TypeDef</a>;
<a name="l00331"></a>00331 
<a name="l00332"></a>00332 <span class="comment">/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/</span>
<a name="l00334"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html">00334</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00335"></a>00335 {
<a name="l00336"></a>00336   <span class="keyword">union </span>{
<a name="l00337"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ada047e44cafc48942e2c094f11e422ce">00337</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ada047e44cafc48942e2c094f11e422ce">RBR</a>;
<a name="l00338"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a5e587bae4b1f3a14cbdeec2e2a3e84a7">00338</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a5e587bae4b1f3a14cbdeec2e2a3e84a7">THR</a>;
<a name="l00339"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a49326fc2883951237f3c06ea41f5f3bf">00339</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a49326fc2883951237f3c06ea41f5f3bf">DLL</a>;
<a name="l00340"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a83e56087b281e86c37a25efd473bad96">00340</a>        uint32_t <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a83e56087b281e86c37a25efd473bad96">RESERVED0</a>;
<a name="l00341"></a>00341   };
<a name="l00342"></a>00342   <span class="keyword">union </span>{
<a name="l00343"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#af8faf171fe8979361fb515e2eb230767">00343</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#af8faf171fe8979361fb515e2eb230767">DLM</a>;
<a name="l00344"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#afc1b84e9e3670126ce7bc52a44cf0315">00344</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#afc1b84e9e3670126ce7bc52a44cf0315">IER</a>;
<a name="l00345"></a>00345   };
<a name="l00346"></a>00346   <span class="keyword">union </span>{
<a name="l00347"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a360b5c67d6e31dd5f6a9c6f3ad57b8a0">00347</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a360b5c67d6e31dd5f6a9c6f3ad57b8a0">IIR</a>;
<a name="l00348"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ab64a3a7ef281715892c038fe97e89dbc">00348</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ab64a3a7ef281715892c038fe97e89dbc">FCR</a>;
<a name="l00349"></a>00349   };
<a name="l00350"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#aea64c20a7e4728f9df04beb1984af859">00350</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#aea64c20a7e4728f9df04beb1984af859">LCR</a>;
<a name="l00351"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a173e22851cead2066201c3e67295dd2f">00351</a>        uint8_t  RESERVED1[7];
<a name="l00352"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a5b30039ff0f16a3b240caed193de1a5e">00352</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a5b30039ff0f16a3b240caed193de1a5e">LSR</a>;
<a name="l00353"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a64adf657c55c28932456be765e128c4a">00353</a>        uint8_t  RESERVED2[7];
<a name="l00354"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a0c0d836bbcf6de3752b0db2146d54aff">00354</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a0c0d836bbcf6de3752b0db2146d54aff">SCR</a>;
<a name="l00355"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a0a1b19f1bfa0c04d2d438be05a9a302a">00355</a>        uint8_t  RESERVED3[3];
<a name="l00356"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a7d5c974d92ad63ce7f5e212a7b4bfcd0">00356</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a7d5c974d92ad63ce7f5e212a7b4bfcd0">ACR</a>;
<a name="l00357"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a4ac74674757385ade3cc489a4f6f1d8a">00357</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a4ac74674757385ade3cc489a4f6f1d8a">ICR</a>;
<a name="l00358"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ab2e7c1f79d81cbdc6e8f97d712974b6a">00358</a>        uint8_t  RESERVED4[3];
<a name="l00359"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a64c00ea759f830212bbd1680d05b9527">00359</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a64c00ea759f830212bbd1680d05b9527">FDR</a>;
<a name="l00360"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#ab4df110da4829f54d9b0a997197ebb2b">00360</a>        uint8_t  RESERVED5[7];
<a name="l00361"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a9669e26ff888ff51aad1218a052a7bcb">00361</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a9669e26ff888ff51aad1218a052a7bcb">TER</a>;
<a name="l00362"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#a02f6e44a93ef057eb9094bb8e625598e">00362</a>        uint8_t  RESERVED6[39];
<a name="l00363"></a><a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#abc7c1a66f6f9a77c2b22de6c1a4d4da4">00363</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html#abc7c1a66f6f9a77c2b22de6c1a4d4da4">FIFOLVL</a>;
<a name="l00364"></a>00364 } <a class="code" href="struct_l_p_c___u_a_r_t___type_def.html" title="Universal Asynchronous Receiver Transmitter (UART) register structure definition.">LPC_UART_TypeDef</a>;
<a name="l00365"></a>00365 
<a name="l00367"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html">00367</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00368"></a>00368 {
<a name="l00369"></a>00369   <span class="keyword">union </span>{
<a name="l00370"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a9893b213067c84bbd233ded057adce7d">00370</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a9893b213067c84bbd233ded057adce7d">RBR</a>;
<a name="l00371"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a6a75cbd28dbb9e5bb7ddd9c1dfd80443">00371</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a6a75cbd28dbb9e5bb7ddd9c1dfd80443">THR</a>;
<a name="l00372"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ab2ca502f17a630b5a86338ad625d0533">00372</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ab2ca502f17a630b5a86338ad625d0533">DLL</a>;
<a name="l00373"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ad31c38487208185613f66b91060a4646">00373</a>        uint32_t <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ad31c38487208185613f66b91060a4646">RESERVED0</a>;
<a name="l00374"></a>00374   };
<a name="l00375"></a>00375   <span class="keyword">union </span>{
<a name="l00376"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#afda673e1206992eedf39811ab80cb48f">00376</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#afda673e1206992eedf39811ab80cb48f">DLM</a>;
<a name="l00377"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a34da2683d8d0cbcfec0e7045fbe4b18e">00377</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a34da2683d8d0cbcfec0e7045fbe4b18e">IER</a>;
<a name="l00378"></a>00378   };
<a name="l00379"></a>00379   <span class="keyword">union </span>{
<a name="l00380"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a34fd9f183c7716204ce85518eaebcf39">00380</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a34fd9f183c7716204ce85518eaebcf39">IIR</a>;
<a name="l00381"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a670849e581f817faf960a28a9de631c0">00381</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a670849e581f817faf960a28a9de631c0">FCR</a>;
<a name="l00382"></a>00382   };
<a name="l00383"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ac672eda792119f154b66893d87a0525e">00383</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ac672eda792119f154b66893d87a0525e">LCR</a>;
<a name="l00384"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#aff84130676c27d92d91cbf225f210f9c">00384</a>        uint8_t  RESERVED1[7];
<a name="l00385"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a45ac2df23a9fd35ef512a99d2779c576">00385</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a45ac2df23a9fd35ef512a99d2779c576">LSR</a>;
<a name="l00386"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a98a6edb62546f151646f2bb50fd7e47f">00386</a>        uint8_t  RESERVED2[7];
<a name="l00387"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#af6f9e363ab197419959def6cb8dda0bf">00387</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#af6f9e363ab197419959def6cb8dda0bf">SCR</a>;
<a name="l00388"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a49f0b0d17c3c67b7b2922feabb3bb95d">00388</a>        uint8_t  RESERVED3[3];
<a name="l00389"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a0518203067bd82ba86f61964fa5d27ba">00389</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a0518203067bd82ba86f61964fa5d27ba">ACR</a>;
<a name="l00390"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#aec2844f31f8e6161f27fdd6b85237d9f">00390</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#aec2844f31f8e6161f27fdd6b85237d9f">ICR</a>;
<a name="l00391"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#ac1a71904047966810554fa03ddffdbf2">00391</a>        uint8_t  RESERVED4[3];
<a name="l00392"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a5c103d92abeb5880ab2dde2f6ed78f57">00392</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a5c103d92abeb5880ab2dde2f6ed78f57">FDR</a>;
<a name="l00393"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a5d916b8af24a4b9404452640e5229779">00393</a>        uint8_t  RESERVED5[7];
<a name="l00394"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a195604b4a6e90d997b832156b842aa3d">00394</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a195604b4a6e90d997b832156b842aa3d">TER</a>;
<a name="l00395"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a0cfc37662012c7c04d4539d88baa86f0">00395</a>        uint8_t  RESERVED6[39];
<a name="l00396"></a><a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a0f9491fddbf10118bf937d4549088659">00396</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html#a0f9491fddbf10118bf937d4549088659">FIFOLVL</a>;
<a name="l00397"></a>00397 } <a class="code" href="struct_l_p_c___u_a_r_t0___type_def.html" title="Universal Asynchronous Receiver Transmitter 0 (UART0) register structure definition.">LPC_UART0_TypeDef</a>;
<a name="l00398"></a>00398 
<a name="l00400"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html">00400</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00401"></a>00401 {
<a name="l00402"></a>00402   <span class="keyword">union </span>{
<a name="l00403"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae6e1a8c9fc74cabf8dcb1e4bdd65a8bf">00403</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae6e1a8c9fc74cabf8dcb1e4bdd65a8bf">RBR</a>;
<a name="l00404"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a12e9a213fd67c6bed7ba73d8e811ea3a">00404</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a12e9a213fd67c6bed7ba73d8e811ea3a">THR</a>;
<a name="l00405"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae7ba7dce82162c6ad1eeb482f7c6549a">00405</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae7ba7dce82162c6ad1eeb482f7c6549a">DLL</a>;
<a name="l00406"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a0cccc07f3e2c9d1f04df27f14fdc6d1a">00406</a>        uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a0cccc07f3e2c9d1f04df27f14fdc6d1a">RESERVED0</a>;
<a name="l00407"></a>00407   };
<a name="l00408"></a>00408   <span class="keyword">union </span>{
<a name="l00409"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a7e46410709fd9acce54a3e05aad2d500">00409</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a7e46410709fd9acce54a3e05aad2d500">DLM</a>;
<a name="l00410"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#adee06096826ff2cfc53d2a063a2d7f8c">00410</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#adee06096826ff2cfc53d2a063a2d7f8c">IER</a>;
<a name="l00411"></a>00411   };
<a name="l00412"></a>00412   <span class="keyword">union </span>{
<a name="l00413"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a26e339a178cd598a5b7ab18eb0201c0b">00413</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a26e339a178cd598a5b7ab18eb0201c0b">IIR</a>;
<a name="l00414"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a73b3a5a2f1ec5f5691bfc681dc88facf">00414</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a73b3a5a2f1ec5f5691bfc681dc88facf">FCR</a>;
<a name="l00415"></a>00415   };
<a name="l00416"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a40bee0cb3712923a7b22f97fc2dcae7d">00416</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a40bee0cb3712923a7b22f97fc2dcae7d">LCR</a>;
<a name="l00417"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a72f0b31e5973cdb3267ebfc9f21cfc00">00417</a>        uint8_t  RESERVED1[3];
<a name="l00418"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#afcd3f9c39b0335bef11d1703cbb4c319">00418</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#afcd3f9c39b0335bef11d1703cbb4c319">MCR</a>;
<a name="l00419"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a949d13ece59d8685c46a022ded955a32">00419</a>        uint8_t  RESERVED2[3];
<a name="l00420"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#aebdca7a1d1dedbcb3f61d24c84cd69a9">00420</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#aebdca7a1d1dedbcb3f61d24c84cd69a9">LSR</a>;
<a name="l00421"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a90df022fbb298491600c58bd638bceb0">00421</a>        uint8_t  RESERVED3[3];
<a name="l00422"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a590fb189c1ae11fe234423cd20c1227c">00422</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a590fb189c1ae11fe234423cd20c1227c">MSR</a>;
<a name="l00423"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a12993dd6c88e97ec0995ce695478de9c">00423</a>        uint8_t  RESERVED4[3];
<a name="l00424"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a0c2ad43ebf02d695172065f5f2a71d59">00424</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a0c2ad43ebf02d695172065f5f2a71d59">SCR</a>;
<a name="l00425"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a15aebc81134eb31c60b092b3147dedcd">00425</a>        uint8_t  RESERVED5[3];
<a name="l00426"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a08430338a184c676b5e0dc5bb3e8e667">00426</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a08430338a184c676b5e0dc5bb3e8e667">ACR</a>;
<a name="l00427"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a80e3d5071a644e197551ae695bfc49c1">00427</a>        uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a80e3d5071a644e197551ae695bfc49c1">RESERVED6</a>;
<a name="l00428"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a8743216657b9a50bf0349ef41d420985">00428</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a8743216657b9a50bf0349ef41d420985">FDR</a>;
<a name="l00429"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a9c622423d4dd140aaea690645b0c3702">00429</a>        uint32_t <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a9c622423d4dd140aaea690645b0c3702">RESERVED7</a>;
<a name="l00430"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae1d0d37313543a6e6c365c86763ed79b">00430</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ae1d0d37313543a6e6c365c86763ed79b">TER</a>;
<a name="l00431"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a193b2ce04d2e6cd7ce5fc412631010dd">00431</a>        uint8_t  RESERVED8[27];
<a name="l00432"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a916353b71cb3ec061b2eef4c9f8eaf68">00432</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a916353b71cb3ec061b2eef4c9f8eaf68">RS485CTRL</a>;
<a name="l00433"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#a772cb11083349e05366b7c3047f6f52f">00433</a>        uint8_t  RESERVED9[3];
<a name="l00434"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#aa9eac9205cc4503b0447d7dbd1742f88">00434</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#aa9eac9205cc4503b0447d7dbd1742f88">ADRMATCH</a>;
<a name="l00435"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#abd398f69dcfbbe91c8d13bf4a4449ae3">00435</a>        uint8_t  RESERVED10[3];
<a name="l00436"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ab89d9a8dbf2a31a1e3bf84326f5a4933">00436</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#ab89d9a8dbf2a31a1e3bf84326f5a4933">RS485DLY</a>;
<a name="l00437"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#afe8aff2c027ff9b686ce9ffb549fd11e">00437</a>        uint8_t  RESERVED11[3];
<a name="l00438"></a><a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#adc297c35b3245e9c2608e9c27ae8f1e9">00438</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint8_t  <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html#adc297c35b3245e9c2608e9c27ae8f1e9">FIFOLVL</a>;
<a name="l00439"></a>00439 } <a class="code" href="struct_l_p_c___u_a_r_t1___type_def.html" title="Universal Asynchronous Receiver Transmitter 1 (UART1) register structure definition.">LPC_UART1_TypeDef</a>;
<a name="l00440"></a>00440 
<a name="l00441"></a>00441 <span class="comment">/*------------- Serial Peripheral Interface (SPI) ----------------------------*/</span>
<a name="l00443"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html">00443</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00444"></a>00444 {
<a name="l00445"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#a2ce61227161a66342c0dce924d0321fb">00445</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_p_i___type_def.html#a2ce61227161a66342c0dce924d0321fb">SPCR</a>;
<a name="l00446"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#aebaf5d2e15c80b727a52076ebdfe2f03">00446</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___s_p_i___type_def.html#aebaf5d2e15c80b727a52076ebdfe2f03">SPSR</a>;
<a name="l00447"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#a558ae704365ae5678d2f08a4e5074ec3">00447</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_p_i___type_def.html#a558ae704365ae5678d2f08a4e5074ec3">SPDR</a>;
<a name="l00448"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#a1d5ce3ea68c2dfaec14d3597cdff996e">00448</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_p_i___type_def.html#a1d5ce3ea68c2dfaec14d3597cdff996e">SPCCR</a>;
<a name="l00449"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#ab3810e1580fe80ed0b3651cf5c035ab7">00449</a>        uint32_t RESERVED0[3];
<a name="l00450"></a><a class="code" href="struct_l_p_c___s_p_i___type_def.html#a44a40dbc05125566c6f8426daa13254a">00450</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_p_i___type_def.html#a44a40dbc05125566c6f8426daa13254a">SPINT</a>;
<a name="l00451"></a>00451 } <a class="code" href="struct_l_p_c___s_p_i___type_def.html" title="Serial Peripheral Interface (SPI) register structure definition.">LPC_SPI_TypeDef</a>;
<a name="l00452"></a>00452 
<a name="l00453"></a>00453 <span class="comment">/*------------- Synchronous Serial Communication (SSP) -----------------------*/</span>
<a name="l00455"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html">00455</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00456"></a>00456 {
<a name="l00457"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a32a68722d4e2c1b7dfc787c779a380a3">00457</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a32a68722d4e2c1b7dfc787c779a380a3">CR0</a>;
<a name="l00458"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a016ea63a8c118f5b75a64a6e5f81c984">00458</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a016ea63a8c118f5b75a64a6e5f81c984">CR1</a>;
<a name="l00459"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a305381985bf14d72c35b97ac3b56661e">00459</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a305381985bf14d72c35b97ac3b56661e">DR</a>;
<a name="l00460"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a82edd1e82e00dbdc9db58e5173893d77">00460</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a82edd1e82e00dbdc9db58e5173893d77">SR</a>;
<a name="l00461"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a454a4d1a09ccb43c3f3a8965a8b30087">00461</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a454a4d1a09ccb43c3f3a8965a8b30087">CPSR</a>;
<a name="l00462"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a61842512c283fb1c980ec6f04927a62c">00462</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a61842512c283fb1c980ec6f04927a62c">IMSC</a>;
<a name="l00463"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#ac864a0884f6871821318720c8a7c06ef">00463</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#ac864a0884f6871821318720c8a7c06ef">RIS</a>;
<a name="l00464"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a47daa783e72e341ffa762b8f89d32a74">00464</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a47daa783e72e341ffa762b8f89d32a74">MIS</a>;
<a name="l00465"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#afd52865baab6eb928d86d2f79293df2d">00465</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#afd52865baab6eb928d86d2f79293df2d">ICR</a>;
<a name="l00466"></a><a class="code" href="struct_l_p_c___s_s_p___type_def.html#a94233394a593bf8de9a8497bf37cbc3c">00466</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___s_s_p___type_def.html#a94233394a593bf8de9a8497bf37cbc3c">DMACR</a>;
<a name="l00467"></a>00467 } <a class="code" href="struct_l_p_c___s_s_p___type_def.html" title="Synchronous Serial Communication (SSP) register structure definition.">LPC_SSP_TypeDef</a>;
<a name="l00468"></a>00468 
<a name="l00469"></a>00469 <span class="comment">/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/</span>
<a name="l00471"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html">00471</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00472"></a>00472 {
<a name="l00473"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a24f797c8b2d60a001ade61b79aed6a16">00473</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a24f797c8b2d60a001ade61b79aed6a16">I2CONSET</a>;
<a name="l00474"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a31c1d47ac80feae537f5e52a1822ac35">00474</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a31c1d47ac80feae537f5e52a1822ac35">I2STAT</a>;
<a name="l00475"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a61742ea91ae9c2922d72433666477fb0">00475</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a61742ea91ae9c2922d72433666477fb0">I2DAT</a>;
<a name="l00476"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a2b8bd06894697a92090ebff19efc9568">00476</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a2b8bd06894697a92090ebff19efc9568">I2ADR0</a>;
<a name="l00477"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#af01afde227e49278f1c0e6a2041ce261">00477</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#af01afde227e49278f1c0e6a2041ce261">I2SCLH</a>;
<a name="l00478"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#acb1c72614b4277afac12c2152a47dc26">00478</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#acb1c72614b4277afac12c2152a47dc26">I2SCLL</a>;
<a name="l00479"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a3251518905db7b64c27cb38ca9863fb2">00479</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a3251518905db7b64c27cb38ca9863fb2">I2CONCLR</a>;
<a name="l00480"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a132689ac34ccf6d86dc52216b4c4987c">00480</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a132689ac34ccf6d86dc52216b4c4987c">MMCTRL</a>;
<a name="l00481"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a4b5978241a790c38417a1ef872e663df">00481</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a4b5978241a790c38417a1ef872e663df">I2ADR1</a>;
<a name="l00482"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a69b881b2edd482d8e33df2617592d457">00482</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a69b881b2edd482d8e33df2617592d457">I2ADR2</a>;
<a name="l00483"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#aadffb35682aaa5bddea920a4cb0a0246">00483</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#aadffb35682aaa5bddea920a4cb0a0246">I2ADR3</a>;
<a name="l00484"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#ab1a646fb963fbf20b91ebcdf1e70fcfa">00484</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#ab1a646fb963fbf20b91ebcdf1e70fcfa">I2DATA_BUFFER</a>;
<a name="l00485"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a9017881d37664444929d9e36baa65589">00485</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a9017881d37664444929d9e36baa65589">I2MASK0</a>;
<a name="l00486"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a71ee8a47fe07eb71675d3d97874e898f">00486</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a71ee8a47fe07eb71675d3d97874e898f">I2MASK1</a>;
<a name="l00487"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a9a17d8876473ebcc8378e76762ad7d08">00487</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a9a17d8876473ebcc8378e76762ad7d08">I2MASK2</a>;
<a name="l00488"></a><a class="code" href="struct_l_p_c___i2_c___type_def.html#a3e47944a2b1d1d5666ee37fcda81519f">00488</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_c___type_def.html#a3e47944a2b1d1d5666ee37fcda81519f">I2MASK3</a>;
<a name="l00489"></a>00489 } <a class="code" href="struct_l_p_c___i2_c___type_def.html" title="Inter-Integrated Circuit (I2C) register structure definition.">LPC_I2C_TypeDef</a>;
<a name="l00490"></a>00490 
<a name="l00491"></a>00491 <span class="comment">/*------------- Inter IC Sound (I2S) -----------------------------------------*/</span>
<a name="l00493"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html">00493</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00494"></a>00494 {
<a name="l00495"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#ae4208fc514ea78b5f7941017c1f67959">00495</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#ae4208fc514ea78b5f7941017c1f67959">I2SDAO</a>;
<a name="l00496"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a9f541e2ce6e843fc6d162c627561f88f">00496</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a9f541e2ce6e843fc6d162c627561f88f">I2SDAI</a>;
<a name="l00497"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a2d49566bdca12980b001175683fe0fde">00497</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a2d49566bdca12980b001175683fe0fde">I2STXFIFO</a>;
<a name="l00498"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#ab5ecf82c8d91e52138f639f5ff410940">00498</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#ab5ecf82c8d91e52138f639f5ff410940">I2SRXFIFO</a>;
<a name="l00499"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a7676081d47f5ccc4b860ae54d00e4223">00499</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a7676081d47f5ccc4b860ae54d00e4223">I2SSTATE</a>;
<a name="l00500"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a74f0d6632b57ee8a2b0bab605cae3542">00500</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a74f0d6632b57ee8a2b0bab605cae3542">I2SDMA1</a>;
<a name="l00501"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a0beac2c6380bac635ec590e2f42c9a54">00501</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a0beac2c6380bac635ec590e2f42c9a54">I2SDMA2</a>;
<a name="l00502"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#aa90732c12a0e83e0d07cace0b6847403">00502</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#aa90732c12a0e83e0d07cace0b6847403">I2SIRQ</a>;
<a name="l00503"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#ac35b10a16f9f7276b679a4470a1ddcad">00503</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#ac35b10a16f9f7276b679a4470a1ddcad">I2STXRATE</a>;
<a name="l00504"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a2663a5e8f2e79524ecd78e6b9cca25f3">00504</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a2663a5e8f2e79524ecd78e6b9cca25f3">I2SRXRATE</a>;
<a name="l00505"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a8e85831e05c576f7f4611e45c38dad75">00505</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a8e85831e05c576f7f4611e45c38dad75">I2STXBITRATE</a>;
<a name="l00506"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a6cdfab594ba840c805cf48ad47e23bae">00506</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a6cdfab594ba840c805cf48ad47e23bae">I2SRXBITRATE</a>;
<a name="l00507"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a61f677e1ab7fe967b8a491abaf272c2e">00507</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a61f677e1ab7fe967b8a491abaf272c2e">I2STXMODE</a>;
<a name="l00508"></a><a class="code" href="struct_l_p_c___i2_s___type_def.html#a824d505ffb143516ddedf21243a9efaa">00508</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___i2_s___type_def.html#a824d505ffb143516ddedf21243a9efaa">I2SRXMODE</a>;
<a name="l00509"></a>00509 } <a class="code" href="struct_l_p_c___i2_s___type_def.html" title="Inter IC Sound (I2S) register structure definition.">LPC_I2S_TypeDef</a>;
<a name="l00510"></a>00510 
<a name="l00511"></a>00511 <span class="comment">/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/</span>
<a name="l00513"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html">00513</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00514"></a>00514 {
<a name="l00515"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html#a61935034ac2503ec1803464a6007e931">00515</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_i_t___type_def.html#a61935034ac2503ec1803464a6007e931">RICOMPVAL</a>;
<a name="l00516"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html#aae32ee454d1d50e89f7c2b115f81c006">00516</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_i_t___type_def.html#aae32ee454d1d50e89f7c2b115f81c006">RIMASK</a>;
<a name="l00517"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html#a37145567c6963158ef90fb929b1b139c">00517</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_i_t___type_def.html#a37145567c6963158ef90fb929b1b139c">RICTRL</a>;
<a name="l00518"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html#a98d0f22f7e719715ab2746fe626b636f">00518</a>        uint8_t  RESERVED0[3];
<a name="l00519"></a><a class="code" href="struct_l_p_c___r_i_t___type_def.html#a56336b32d9afb119f8071e80c1dd754f">00519</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_i_t___type_def.html#a56336b32d9afb119f8071e80c1dd754f">RICOUNTER</a>;
<a name="l00520"></a>00520 } <a class="code" href="struct_l_p_c___r_i_t___type_def.html" title="Repetitive Interrupt Timer (RIT) register structure definition.">LPC_RIT_TypeDef</a>;
<a name="l00521"></a>00521 
<a name="l00522"></a>00522 <span class="comment">/*------------- Real-Time Clock (RTC) ----------------------------------------*/</span>
<a name="l00524"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html">00524</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00525"></a>00525 {
<a name="l00526"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ad426477ee9b45960f84aa97e0bb3b2e3">00526</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ad426477ee9b45960f84aa97e0bb3b2e3">ILR</a>;
<a name="l00527"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6f4c35345a87dea300753b60b26f9e86">00527</a>        uint8_t  RESERVED0[7];
<a name="l00528"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac61a9f77ad3c8f9ed565acf2e95cb458">00528</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac61a9f77ad3c8f9ed565acf2e95cb458">CCR</a>;
<a name="l00529"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a18d805272469609c453d298ba86e1c20">00529</a>        uint8_t  RESERVED1[3];
<a name="l00530"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a3098ab5ae850961f2b5c1e4723c75797">00530</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a3098ab5ae850961f2b5c1e4723c75797">CIIR</a>;
<a name="l00531"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac5569b1766672500d444fcfa87ea2808">00531</a>        uint8_t  RESERVED2[3];
<a name="l00532"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a18176ac70767e089bdf4e3d4bb31f336">00532</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a18176ac70767e089bdf4e3d4bb31f336">AMR</a>;
<a name="l00533"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#aa35451280579ad796a894bb9f73772af">00533</a>        uint8_t  RESERVED3[3];
<a name="l00534"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6adcca1e2ce945815422ebfaea001084">00534</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6adcca1e2ce945815422ebfaea001084">CTIME0</a>;
<a name="l00535"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac7a8f880dfe43b9a0bc3662b295203c3">00535</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac7a8f880dfe43b9a0bc3662b295203c3">CTIME1</a>;
<a name="l00536"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ae97f33c9290e6a5a1fe06501ce61bc55">00536</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ae97f33c9290e6a5a1fe06501ce61bc55">CTIME2</a>;
<a name="l00537"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#abaa5f510bac68e2d9773f2c88f6e578f">00537</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#abaa5f510bac68e2d9773f2c88f6e578f">SEC</a>;
<a name="l00538"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac86165d83302c1c1b5e8f2ec69a3660c">00538</a>        uint8_t  RESERVED4[3];
<a name="l00539"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a9065ffea4a0f953721345000dcd6b581">00539</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a9065ffea4a0f953721345000dcd6b581">MIN</a>;
<a name="l00540"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6b7854da12c830eea230c1eabd08c462">00540</a>        uint8_t  RESERVED5[3];
<a name="l00541"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a05694a4fb7a843082ca0de54273dfb89">00541</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a05694a4fb7a843082ca0de54273dfb89">HOUR</a>;
<a name="l00542"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a3cf8c7043b785fd32cdcb1982fd07574">00542</a>        uint8_t  RESERVED6[3];
<a name="l00543"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#acbeb4876e4845d38ff3f9884af9118cd">00543</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#acbeb4876e4845d38ff3f9884af9118cd">DOM</a>;
<a name="l00544"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#acb6e21a83d76e43ee9e3846ae3e69f3d">00544</a>        uint8_t  RESERVED7[3];
<a name="l00545"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a5bbbf11a071f81d3817b0062452e5adf">00545</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a5bbbf11a071f81d3817b0062452e5adf">DOW</a>;
<a name="l00546"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#affbb10b119fa125af21b4f2eb43f2759">00546</a>        uint8_t  RESERVED8[3];
<a name="l00547"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6aa88a44a5b8efa4e386899b24ea9fc8">00547</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6aa88a44a5b8efa4e386899b24ea9fc8">DOY</a>;
<a name="l00548"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a24b1519d2041d2d62bd0a1d3e16fb110">00548</a>        uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a24b1519d2041d2d62bd0a1d3e16fb110">RESERVED9</a>;
<a name="l00549"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ab4067e9a5571d58b04d8d401d1bc8f8b">00549</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ab4067e9a5571d58b04d8d401d1bc8f8b">MONTH</a>;
<a name="l00550"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a71dd33e8166fba3b22c52789168e1532">00550</a>        uint8_t  RESERVED10[3];
<a name="l00551"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a335ec6d396bcb052d4eea95c885b2c10">00551</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a335ec6d396bcb052d4eea95c885b2c10">YEAR</a>;
<a name="l00552"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a8fb2c40fc7b1eba038cb71cfb4ab2c8d">00552</a>        uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a8fb2c40fc7b1eba038cb71cfb4ab2c8d">RESERVED11</a>;
<a name="l00553"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a64861e8426206c38a63093f7e0665ac7">00553</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a64861e8426206c38a63093f7e0665ac7">CALIBRATION</a>;
<a name="l00554"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ab95f44b08b8225457610892aacecd7b7">00554</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ab95f44b08b8225457610892aacecd7b7">GPREG0</a>;
<a name="l00555"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a611be2bcdbd29eb9e878d11bed860e3a">00555</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a611be2bcdbd29eb9e878d11bed860e3a">GPREG1</a>;
<a name="l00556"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a8be78c4eb16481ab5e55019e8ac8455d">00556</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a8be78c4eb16481ab5e55019e8ac8455d">GPREG2</a>;
<a name="l00557"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac59de886f6ca59b292a71be608050ab3">00557</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac59de886f6ca59b292a71be608050ab3">GPREG3</a>;
<a name="l00558"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6ac74df3716f65ad7b4cbf7d098e49cc">00558</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6ac74df3716f65ad7b4cbf7d098e49cc">GPREG4</a>;
<a name="l00559"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a1e98b7cb38127cf1443eaea515fc715a">00559</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a1e98b7cb38127cf1443eaea515fc715a">RTC_AUXEN</a>;
<a name="l00560"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#abb20c5116b0786d602ed35ab1273fbb7">00560</a>        uint8_t  RESERVED12[3];
<a name="l00561"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#aa3779cd7bc30b543ac9264771714e346">00561</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#aa3779cd7bc30b543ac9264771714e346">RTC_AUX</a>;
<a name="l00562"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a6f76dfabf5d2c1b14b9c2dced68ff82d">00562</a>        uint8_t  RESERVED13[3];
<a name="l00563"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a279fbaac967c83ba8011ff82cfcaac80">00563</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a279fbaac967c83ba8011ff82cfcaac80">ALSEC</a>;
<a name="l00564"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a0081f87af6ba969c4ef60b85e29ff314">00564</a>        uint8_t  RESERVED14[3];
<a name="l00565"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a88bc3e9a4f3b954fd122f3c5ad24abf9">00565</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a88bc3e9a4f3b954fd122f3c5ad24abf9">ALMIN</a>;
<a name="l00566"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#aaeacb97c7dd3947da6ceddab8e7ff9ab">00566</a>        uint8_t  RESERVED15[3];
<a name="l00567"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a030402787d134c2fe2254914346ea0b8">00567</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a030402787d134c2fe2254914346ea0b8">ALHOUR</a>;
<a name="l00568"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#ac5d1ec58fb28b65697f3b89bd4a90ff9">00568</a>        uint8_t  RESERVED16[3];
<a name="l00569"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a3a295a8e54f9bebd4da861c4f3c1bce4">00569</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a3a295a8e54f9bebd4da861c4f3c1bce4">ALDOM</a>;
<a name="l00570"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a78aa9d5277447039b19db727774d9318">00570</a>        uint8_t  RESERVED17[3];
<a name="l00571"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a387becb9a4d641ee35b63bb24a417cc0">00571</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a387becb9a4d641ee35b63bb24a417cc0">ALDOW</a>;
<a name="l00572"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a9ed54c589fea766fb4f797a116dda57f">00572</a>        uint8_t  RESERVED18[3];
<a name="l00573"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a11a67afcd07a6867f2b0484fc91ea4dd">00573</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a11a67afcd07a6867f2b0484fc91ea4dd">ALDOY</a>;
<a name="l00574"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a909bf90bf8e36d2c3ebfa93c40869dbe">00574</a>        uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a909bf90bf8e36d2c3ebfa93c40869dbe">RESERVED19</a>;
<a name="l00575"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a5dd7a4940549d293d9bd629ed2b54eb2">00575</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a5dd7a4940549d293d9bd629ed2b54eb2">ALMON</a>;
<a name="l00576"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a42a5b6f556d31a436249c4710dae7eb7">00576</a>        uint8_t  RESERVED20[3];
<a name="l00577"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a287e351eb6c21f7f86730ee888013df1">00577</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a287e351eb6c21f7f86730ee888013df1">ALYEAR</a>;
<a name="l00578"></a><a class="code" href="struct_l_p_c___r_t_c___type_def.html#a679737cb2219077ea4e97e0d5ccc89d1">00578</a>        uint16_t <a class="code" href="struct_l_p_c___r_t_c___type_def.html#a679737cb2219077ea4e97e0d5ccc89d1">RESERVED21</a>;
<a name="l00579"></a>00579 } <a class="code" href="struct_l_p_c___r_t_c___type_def.html" title="Real-Time Clock (RTC) register structure definition.">LPC_RTC_TypeDef</a>;
<a name="l00580"></a>00580 
<a name="l00581"></a>00581 <span class="comment">/*------------- Watchdog Timer (WDT) -----------------------------------------*/</span>
<a name="l00583"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html">00583</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00584"></a>00584 {
<a name="l00585"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a43d97828d135ab2479191efbcde299ad">00585</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint8_t  <a class="code" href="struct_l_p_c___w_d_t___type_def.html#a43d97828d135ab2479191efbcde299ad">WDMOD</a>;
<a name="l00586"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a1ee4c20a33fe0ae42acea8483a6df2f5">00586</a>        uint8_t  RESERVED0[3];
<a name="l00587"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a3f3785da39c5efbfbe5f615a23b36d17">00587</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___w_d_t___type_def.html#a3f3785da39c5efbfbe5f615a23b36d17">WDTC</a>;
<a name="l00588"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a8634bafd3c6f17146d04293d7064822b">00588</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint8_t  <a class="code" href="struct_l_p_c___w_d_t___type_def.html#a8634bafd3c6f17146d04293d7064822b">WDFEED</a>;
<a name="l00589"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a524d555cdde50ce943fb40d7d4403d82">00589</a>        uint8_t  RESERVED1[3];
<a name="l00590"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a30e695a8014d4d6e61ef9eaf15a967dc">00590</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___w_d_t___type_def.html#a30e695a8014d4d6e61ef9eaf15a967dc">WDTV</a>;
<a name="l00591"></a><a class="code" href="struct_l_p_c___w_d_t___type_def.html#a0dfabd1869bff86b6382764df0937ec2">00591</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___w_d_t___type_def.html#a0dfabd1869bff86b6382764df0937ec2">WDCLKSEL</a>;
<a name="l00592"></a>00592 } <a class="code" href="struct_l_p_c___w_d_t___type_def.html" title="Watchdog Timer (WDT) register structure definition.">LPC_WDT_TypeDef</a>;
<a name="l00593"></a>00593 
<a name="l00594"></a>00594 <span class="comment">/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/</span>
<a name="l00596"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html">00596</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00597"></a>00597 {
<a name="l00598"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#ab0949d845f781071595de5c830fab8a7">00598</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#ab0949d845f781071595de5c830fab8a7">ADCR</a>;
<a name="l00599"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a9a3d600737fba2be947a6b528cc48891">00599</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a9a3d600737fba2be947a6b528cc48891">ADGDR</a>;
<a name="l00600"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a40cf73fb4dbf0486e17c338b59481012">00600</a>        uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a40cf73fb4dbf0486e17c338b59481012">RESERVED0</a>;
<a name="l00601"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a3867c156abd33ddafeb3b51e7b1da97c">00601</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a3867c156abd33ddafeb3b51e7b1da97c">ADINTEN</a>;
<a name="l00602"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a3168f35782efa83907f5a1001b5a53e7">00602</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a3168f35782efa83907f5a1001b5a53e7">ADDR0</a>;
<a name="l00603"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a7413587e4871c63fecf13646dce2f873">00603</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a7413587e4871c63fecf13646dce2f873">ADDR1</a>;
<a name="l00604"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a806e8066ea08898ff51e5ff2f10823b3">00604</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a806e8066ea08898ff51e5ff2f10823b3">ADDR2</a>;
<a name="l00605"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#acac24a0ba2d73729b86a021bcad63ad6">00605</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#acac24a0ba2d73729b86a021bcad63ad6">ADDR3</a>;
<a name="l00606"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a92bfddc3c7b32379c91fcde0f43df495">00606</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a92bfddc3c7b32379c91fcde0f43df495">ADDR4</a>;
<a name="l00607"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#ac698d7e4437bf3230071dc3d8274f4bd">00607</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#ac698d7e4437bf3230071dc3d8274f4bd">ADDR5</a>;
<a name="l00608"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a607f501dbfce5b3fd777a7a4a480a353">00608</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a607f501dbfce5b3fd777a7a4a480a353">ADDR6</a>;
<a name="l00609"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a40afea4e61d223f707998d5f22dbfc7c">00609</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a40afea4e61d223f707998d5f22dbfc7c">ADDR7</a>;
<a name="l00610"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#a731ad153d3d54d3ba2677eecb30c3097">00610</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#a731ad153d3d54d3ba2677eecb30c3097">ADSTAT</a>;
<a name="l00611"></a><a class="code" href="struct_l_p_c___a_d_c___type_def.html#aa66f6667bdd2b2110f2e25e7c8da94a9">00611</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___a_d_c___type_def.html#aa66f6667bdd2b2110f2e25e7c8da94a9">ADTRM</a>;
<a name="l00612"></a>00612 } <a class="code" href="struct_l_p_c___a_d_c___type_def.html" title="Analog-to-Digital Converter (ADC) register structure definition.">LPC_ADC_TypeDef</a>;
<a name="l00613"></a>00613 
<a name="l00614"></a>00614 <span class="comment">/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/</span>
<a name="l00616"></a><a class="code" href="struct_l_p_c___d_a_c___type_def.html">00616</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00617"></a>00617 {
<a name="l00618"></a><a class="code" href="struct_l_p_c___d_a_c___type_def.html#aeca5925957d02f483828953f108d8472">00618</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___d_a_c___type_def.html#aeca5925957d02f483828953f108d8472">DACR</a>;
<a name="l00619"></a><a class="code" href="struct_l_p_c___d_a_c___type_def.html#a98d077f22452e939c5393ba58460165d">00619</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___d_a_c___type_def.html#a98d077f22452e939c5393ba58460165d">DACCTRL</a>;
<a name="l00620"></a><a class="code" href="struct_l_p_c___d_a_c___type_def.html#ae31627b66bf9b21cdfd825b81d65b252">00620</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t <a class="code" href="struct_l_p_c___d_a_c___type_def.html#ae31627b66bf9b21cdfd825b81d65b252">DACCNTVAL</a>;
<a name="l00621"></a>00621 } <a class="code" href="struct_l_p_c___d_a_c___type_def.html" title="Digital-to-Analog Converter (DAC) register structure definition.">LPC_DAC_TypeDef</a>;
<a name="l00622"></a>00622 
<a name="l00623"></a>00623 <span class="comment">/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/</span>
<a name="l00625"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html">00625</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00626"></a>00626 {
<a name="l00627"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2942d83827a853d326bed78d71585674">00627</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2942d83827a853d326bed78d71585674">MCCON</a>;
<a name="l00628"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#adc3ebfde76e61f94c670efb72b156237">00628</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#adc3ebfde76e61f94c670efb72b156237">MCCON_SET</a>;
<a name="l00629"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2da1d71128abe6f47897e9ed263a2bde">00629</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2da1d71128abe6f47897e9ed263a2bde">MCCON_CLR</a>;
<a name="l00630"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ae13e568ffdae5b02ef641f56ecc61174">00630</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ae13e568ffdae5b02ef641f56ecc61174">MCCAPCON</a>;
<a name="l00631"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a81287b21eea8d20f6782ab846bffc322">00631</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a81287b21eea8d20f6782ab846bffc322">MCCAPCON_SET</a>;
<a name="l00632"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a0e8e4468bf1b356f7627e068cd425c29">00632</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a0e8e4468bf1b356f7627e068cd425c29">MCCAPCON_CLR</a>;
<a name="l00633"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a52c354973cdf330d2623a2c80d967d7e">00633</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a52c354973cdf330d2623a2c80d967d7e">MCTIM0</a>;
<a name="l00634"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3f8405e5c04f6da3f27b0cd94570fa0d">00634</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3f8405e5c04f6da3f27b0cd94570fa0d">MCTIM1</a>;
<a name="l00635"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a00588eb0e9d6752950295155f0d55a0e">00635</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a00588eb0e9d6752950295155f0d55a0e">MCTIM2</a>;
<a name="l00636"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2cc081dabc03deb6bba329f8fde08bde">00636</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2cc081dabc03deb6bba329f8fde08bde">MCPER0</a>;
<a name="l00637"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aef3e346cb0e644e1e26b4a19396cc87b">00637</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aef3e346cb0e644e1e26b4a19396cc87b">MCPER1</a>;
<a name="l00638"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a64595d9c412e460f2c54b5dbba8a8ed8">00638</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a64595d9c412e460f2c54b5dbba8a8ed8">MCPER2</a>;
<a name="l00639"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3f68be0edc5bec1b9ea0760442ffe84c">00639</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3f68be0edc5bec1b9ea0760442ffe84c">MCPW0</a>;
<a name="l00640"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3908958e6f18bbb84b73f61c4c725625">00640</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a3908958e6f18bbb84b73f61c4c725625">MCPW1</a>;
<a name="l00641"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ab9bbe79c16f95cd63481d0ad48aafd13">00641</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ab9bbe79c16f95cd63481d0ad48aafd13">MCPW2</a>;
<a name="l00642"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a8d3f2db1554ed67c3c068d5e80f6fe36">00642</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a8d3f2db1554ed67c3c068d5e80f6fe36">MCDEADTIME</a>;
<a name="l00643"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a19598a164eefbb3350c6bba6ee3c1131">00643</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a19598a164eefbb3350c6bba6ee3c1131">MCCCP</a>;
<a name="l00644"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aec3586216e9101bc27dfd479c48343c6">00644</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aec3586216e9101bc27dfd479c48343c6">MCCR0</a>;
<a name="l00645"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aa6943a08eb222b7b215778ef0150dc4d">00645</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#aa6943a08eb222b7b215778ef0150dc4d">MCCR1</a>;
<a name="l00646"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ac85b4071c393b49a1ebd7cc456bc9c9f">00646</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#ac85b4071c393b49a1ebd7cc456bc9c9f">MCCR2</a>;
<a name="l00647"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a9d1e6ed2cc076134976db8e101533165">00647</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a9d1e6ed2cc076134976db8e101533165">MCINTEN</a>;
<a name="l00648"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#adb2aed3be118339970a6226d2515c14a">00648</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#adb2aed3be118339970a6226d2515c14a">MCINTEN_SET</a>;
<a name="l00649"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a7e0bb2b9cb52b2ffd9e80e42c2b31a8c">00649</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a7e0bb2b9cb52b2ffd9e80e42c2b31a8c">MCINTEN_CLR</a>;
<a name="l00650"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a72708878c66da381e0df40d6ce873d74">00650</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a72708878c66da381e0df40d6ce873d74">MCCNTCON</a>;
<a name="l00651"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#abea6b0f45294c5ede1c8ea71b71a7a60">00651</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#abea6b0f45294c5ede1c8ea71b71a7a60">MCCNTCON_SET</a>;
<a name="l00652"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a58c62782e73eac272467226ac5c5833f">00652</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a58c62782e73eac272467226ac5c5833f">MCCNTCON_CLR</a>;
<a name="l00653"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a61c34c0ff77a8ec6ac23f195a8a14363">00653</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a61c34c0ff77a8ec6ac23f195a8a14363">MCINTFLAG</a>;
<a name="l00654"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2096b9443c6874c83e827c425bb2e979">00654</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a2096b9443c6874c83e827c425bb2e979">MCINTFLAG_SET</a>;
<a name="l00655"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a953788a544160d6b088acc0f33f1fccb">00655</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a953788a544160d6b088acc0f33f1fccb">MCINTFLAG_CLR</a>;
<a name="l00656"></a><a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a8094300f14c294ffaa14db0c1a006582">00656</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html#a8094300f14c294ffaa14db0c1a006582">MCCAP_CLR</a>;
<a name="l00657"></a>00657 } <a class="code" href="struct_l_p_c___m_c_p_w_m___type_def.html" title="Motor Control Pulse-Width Modulation (MCPWM) register structure definition.">LPC_MCPWM_TypeDef</a>;
<a name="l00658"></a>00658 
<a name="l00659"></a>00659 <span class="comment">/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/</span>
<a name="l00661"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html">00661</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00662"></a>00662 {
<a name="l00663"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#acdad8732bc69abc81a15ebad50cf48ea">00663</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#acdad8732bc69abc81a15ebad50cf48ea">QEICON</a>;
<a name="l00664"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#ad26ec677f7a9574b537ad91fa6a69a08">00664</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#ad26ec677f7a9574b537ad91fa6a69a08">QEISTAT</a>;
<a name="l00665"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#aac33dc0f19dd0ed0132c86f0d0f7d64d">00665</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#aac33dc0f19dd0ed0132c86f0d0f7d64d">QEICONF</a>;
<a name="l00666"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a4cd685a0c827793ba0c7e28ec13cb74b">00666</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a4cd685a0c827793ba0c7e28ec13cb74b">QEIPOS</a>;
<a name="l00667"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a0e31769d6c9fe5d4e8c4b425d227b6bf">00667</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a0e31769d6c9fe5d4e8c4b425d227b6bf">QEIMAXPOS</a>;
<a name="l00668"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a78d0e472de69a6191632cc00c7a01f3e">00668</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a78d0e472de69a6191632cc00c7a01f3e">CMPOS0</a>;
<a name="l00669"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#ae49fa2464aac3f124c22f4a3f57ee818">00669</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#ae49fa2464aac3f124c22f4a3f57ee818">CMPOS1</a>;
<a name="l00670"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a16d30971f7330c1e155fb16e7a353263">00670</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a16d30971f7330c1e155fb16e7a353263">CMPOS2</a>;
<a name="l00671"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#aff2e49f51268eb6ffbec601e665be1a8">00671</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#aff2e49f51268eb6ffbec601e665be1a8">INXCNT</a>;
<a name="l00672"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a1b1fb5a0041e28090a2ff32ba6209921">00672</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a1b1fb5a0041e28090a2ff32ba6209921">INXCMP</a>;
<a name="l00673"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#af9097e4707cac73c61c37cd25139e854">00673</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#af9097e4707cac73c61c37cd25139e854">QEILOAD</a>;
<a name="l00674"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a1d12b48e42270dcdedf04c6fd170300f">00674</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a1d12b48e42270dcdedf04c6fd170300f">QEITIME</a>;
<a name="l00675"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a71f4ca0bceb1f24423af786f62e452bd">00675</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a71f4ca0bceb1f24423af786f62e452bd">QEIVEL</a>;
<a name="l00676"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a553b866446af9ed0856e06e173bbfeb0">00676</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a553b866446af9ed0856e06e173bbfeb0">QEICAP</a>;
<a name="l00677"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#ab729b9204d31a6da76b8152a9cf29408">00677</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#ab729b9204d31a6da76b8152a9cf29408">VELCOMP</a>;
<a name="l00678"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a020b43df21b6bb6c2be17f6d89918cb7">00678</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a020b43df21b6bb6c2be17f6d89918cb7">FILTER</a>;
<a name="l00679"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a6fc6639d5d24342ffa303429b1e0bce6">00679</a>        uint32_t RESERVED0[998];
<a name="l00680"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a935ec5ba26add1b84b4df302906acacc">00680</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a935ec5ba26add1b84b4df302906acacc">QEIIEC</a>;
<a name="l00681"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#aa7aab8d5b808461c63f3878b35a5fcfc">00681</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#aa7aab8d5b808461c63f3878b35a5fcfc">QEIIES</a>;
<a name="l00682"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#ae099ae89f9785415dfc26f156bc9053d">00682</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#ae099ae89f9785415dfc26f156bc9053d">QEIINTSTAT</a>;
<a name="l00683"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a0fa885be91b6d6ae42be94085a1ce162">00683</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a0fa885be91b6d6ae42be94085a1ce162">QEIIE</a>;
<a name="l00684"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#ab9c41d1d9325018b2ac00b1141bde646">00684</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#ab9c41d1d9325018b2ac00b1141bde646">QEICLR</a>;
<a name="l00685"></a><a class="code" href="struct_l_p_c___q_e_i___type_def.html#a7b830cee15e2213ba5c569c1e5e0e026">00685</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___q_e_i___type_def.html#a7b830cee15e2213ba5c569c1e5e0e026">QEISET</a>;
<a name="l00686"></a>00686 } <a class="code" href="struct_l_p_c___q_e_i___type_def.html" title="Quadrature Encoder Interface (QEI) register structure definition.">LPC_QEI_TypeDef</a>;
<a name="l00687"></a>00687 
<a name="l00688"></a>00688 <span class="comment">/*------------- Controller Area Network (CAN) --------------------------------*/</span>
<a name="l00690"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html">00690</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00691"></a>00691 {
<a name="l00692"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html#a4aa976ce2626f44c67748abac073c9b6">00692</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t mask[512];              <span class="comment">/* ID Masks                           */</span>
<a name="l00693"></a>00693 } <a class="code" href="struct_l_p_c___c_a_n_a_f___r_a_m___type_def.html" title="Controller Area Network Acceptance Filter RAM (CANAF_RAM)structure definition.">LPC_CANAF_RAM_TypeDef</a>;
<a name="l00694"></a>00694 
<a name="l00696"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html">00696</a> <span class="keyword">typedef</span> <span class="keyword">struct                          </span><span class="comment">/* Acceptance Filter Registers        */</span>
<a name="l00697"></a>00697 {
<a name="l00698"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a46504ef3dd5f85d3d2733af522b455bc">00698</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a46504ef3dd5f85d3d2733af522b455bc">AFMR</a>;
<a name="l00699"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a55cb93958630b8b11dc10c682d7ede3a">00699</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a55cb93958630b8b11dc10c682d7ede3a">SFF_sa</a>;
<a name="l00700"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a372d5dfdf917983f56e4b337dba0cbba">00700</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a372d5dfdf917983f56e4b337dba0cbba">SFF_GRP_sa</a>;
<a name="l00701"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a89c7026753c5e55a3e54a8382cd6a335">00701</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a89c7026753c5e55a3e54a8382cd6a335">EFF_sa</a>;
<a name="l00702"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a4d4dd49407ea55b29ba5ccc6b3601cdf">00702</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a4d4dd49407ea55b29ba5ccc6b3601cdf">EFF_GRP_sa</a>;
<a name="l00703"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a705055dcc5dd3c2eaa964329bd2bcd7a">00703</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a705055dcc5dd3c2eaa964329bd2bcd7a">ENDofTable</a>;
<a name="l00704"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#adcb2a37f728f5c881aad68c9f390b82b">00704</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#adcb2a37f728f5c881aad68c9f390b82b">LUTerrAd</a>;
<a name="l00705"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a3906d84d280b16221f3abfc14ec40bd7">00705</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a3906d84d280b16221f3abfc14ec40bd7">LUTerr</a>;
<a name="l00706"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a6902f77f625316360c997fefac9aa1f8">00706</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a6902f77f625316360c997fefac9aa1f8">FCANIE</a>;
<a name="l00707"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a22606ef10c6771dd004b2a55664368cd">00707</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#a22606ef10c6771dd004b2a55664368cd">FCANIC0</a>;
<a name="l00708"></a><a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#ae2f12718ba3b2a51607b879f5f8c3806">00708</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html#ae2f12718ba3b2a51607b879f5f8c3806">FCANIC1</a>;
<a name="l00709"></a>00709 } <a class="code" href="struct_l_p_c___c_a_n_a_f___type_def.html" title="Controller Area Network Acceptance Filter(CANAF) register structure definition.">LPC_CANAF_TypeDef</a>;
<a name="l00710"></a>00710 
<a name="l00712"></a><a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html">00712</a> <span class="keyword">typedef</span> <span class="keyword">struct                          </span><span class="comment">/* Central Registers                  */</span>
<a name="l00713"></a>00713 {
<a name="l00714"></a><a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#a8b38016c4e2b002c08b429c1c5782d74">00714</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#a8b38016c4e2b002c08b429c1c5782d74">CANTxSR</a>;
<a name="l00715"></a><a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#abd917011d5f82b5f4f14d4a5d34581b5">00715</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#abd917011d5f82b5f4f14d4a5d34581b5">CANRxSR</a>;
<a name="l00716"></a><a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#a0c84a71ed3701140f202c1864d0e8b0b">00716</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html#a0c84a71ed3701140f202c1864d0e8b0b">CANMSR</a>;
<a name="l00717"></a>00717 } <a class="code" href="struct_l_p_c___c_a_n_c_r___type_def.html" title="Controller Area Network Central (CANCR) register structure definition.">LPC_CANCR_TypeDef</a>;
<a name="l00718"></a>00718 
<a name="l00720"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html">00720</a> <span class="keyword">typedef</span> <span class="keyword">struct                          </span><span class="comment">/* Controller Registers               */</span>
<a name="l00721"></a>00721 {
<a name="l00722"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aa552e0d7073db33aef9d5fff30270385">00722</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aa552e0d7073db33aef9d5fff30270385">MOD</a>;
<a name="l00723"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9c4aaea6fbeb16b7f985b0c1deea0a8a">00723</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9c4aaea6fbeb16b7f985b0c1deea0a8a">CMR</a>;
<a name="l00724"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aaebe05a3f2b42fe710cc55146232709c">00724</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aaebe05a3f2b42fe710cc55146232709c">GSR</a>;
<a name="l00725"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#ab36125aee673455a73715ac364e05b6c">00725</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#ab36125aee673455a73715ac364e05b6c">ICR</a>;
<a name="l00726"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aeb907d3a6919c93ca9951b62595facea">00726</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aeb907d3a6919c93ca9951b62595facea">IER</a>;
<a name="l00727"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a461439cb1fa20001b5177c0589a2fdcc">00727</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a461439cb1fa20001b5177c0589a2fdcc">BTR</a>;
<a name="l00728"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#ad14ee65dbb90b26a372a549efafa951a">00728</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#ad14ee65dbb90b26a372a549efafa951a">EWL</a>;
<a name="l00729"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#af196d4014a0e6c89397940310a708025">00729</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#af196d4014a0e6c89397940310a708025">SR</a>;
<a name="l00730"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a1226fc21b1f4530138d8804d4616ee75">00730</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a1226fc21b1f4530138d8804d4616ee75">RFS</a>;
<a name="l00731"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#acc2d189e0ce8d151633fe7af32b16751">00731</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#acc2d189e0ce8d151633fe7af32b16751">RID</a>;
<a name="l00732"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a3bf277729e96b67ccdda724d32c401e3">00732</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a3bf277729e96b67ccdda724d32c401e3">RDA</a>;
<a name="l00733"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9e30d0e614d62cb8c4dcc028b54b1c1c">00733</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9e30d0e614d62cb8c4dcc028b54b1c1c">RDB</a>;
<a name="l00734"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a919f2abe173ad747c4956a4b6143c790">00734</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a919f2abe173ad747c4956a4b6143c790">TFI1</a>;
<a name="l00735"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#ad941f092e33373988b99e82eb8da7b98">00735</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#ad941f092e33373988b99e82eb8da7b98">TID1</a>;
<a name="l00736"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9407b69dad93493645a9a52ae0c5b4e5">00736</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a9407b69dad93493645a9a52ae0c5b4e5">TDA1</a>;
<a name="l00737"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aaa983819f65057aa69ebc505063a4ed4">00737</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aaa983819f65057aa69ebc505063a4ed4">TDB1</a>;
<a name="l00738"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a494b873717ee793057037fc971f29e42">00738</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a494b873717ee793057037fc971f29e42">TFI2</a>;
<a name="l00739"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aa5df91f305a251b272faf9ec198ec0e8">00739</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aa5df91f305a251b272faf9ec198ec0e8">TID2</a>;
<a name="l00740"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a015d5bfc31a5bfd088f13235096b6f96">00740</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a015d5bfc31a5bfd088f13235096b6f96">TDA2</a>;
<a name="l00741"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a24bc89ade505be907bb328e52480ab71">00741</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a24bc89ade505be907bb328e52480ab71">TDB2</a>;
<a name="l00742"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a19178f6639ceb8596a96e66674c0d840">00742</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a19178f6639ceb8596a96e66674c0d840">TFI3</a>;
<a name="l00743"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a8ad7b5ae2f928f189fea5f021789e1e2">00743</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a8ad7b5ae2f928f189fea5f021789e1e2">TID3</a>;
<a name="l00744"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#a4700b9e9bb0a2f5230fe59e27746038f">00744</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#a4700b9e9bb0a2f5230fe59e27746038f">TDA3</a>;
<a name="l00745"></a><a class="code" href="struct_l_p_c___c_a_n___type_def.html#aeb52795fc9c58e15fc05c7fe43faab4f">00745</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___c_a_n___type_def.html#aeb52795fc9c58e15fc05c7fe43faab4f">TDB3</a>;
<a name="l00746"></a>00746 } <a class="code" href="struct_l_p_c___c_a_n___type_def.html" title="Controller Area Network Controller (CAN) register structure definition.">LPC_CAN_TypeDef</a>;
<a name="l00747"></a>00747 
<a name="l00748"></a>00748 <span class="comment">/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/</span>
<a name="l00750"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html">00750</a> <span class="keyword">typedef</span> <span class="keyword">struct                          </span><span class="comment">/* Common Registers                   */</span>
<a name="l00751"></a>00751 {
<a name="l00752"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ab976615c894b59f210d94ab761ffca71">00752</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ab976615c894b59f210d94ab761ffca71">DMACIntStat</a>;
<a name="l00753"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a19097c01fd1d71e54cf60ce9859f15ef">00753</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a19097c01fd1d71e54cf60ce9859f15ef">DMACIntTCStat</a>;
<a name="l00754"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#adc6f2f63a0452ac0b1c9ea7f73c8db0a">00754</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#adc6f2f63a0452ac0b1c9ea7f73c8db0a">DMACIntTCClear</a>;
<a name="l00755"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8ff4967e332b4f4255fdae5d202240c7">00755</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8ff4967e332b4f4255fdae5d202240c7">DMACIntErrStat</a>;
<a name="l00756"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#af854927900770fc5687d2c42c20994b5">00756</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#af854927900770fc5687d2c42c20994b5">DMACIntErrClr</a>;
<a name="l00757"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8b4b633d2bf304b6e985e58631b961ec">00757</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8b4b633d2bf304b6e985e58631b961ec">DMACRawIntTCStat</a>;
<a name="l00758"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ac2a28d16be18132ba46d8392689e6206">00758</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ac2a28d16be18132ba46d8392689e6206">DMACRawIntErrStat</a>;
<a name="l00759"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a2fb2c9c1b0cc0f7b833820690de9793a">00759</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a2fb2c9c1b0cc0f7b833820690de9793a">DMACEnbldChns</a>;
<a name="l00760"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8e625662ecc8bf38cb26a5f49261b8be">00760</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a8e625662ecc8bf38cb26a5f49261b8be">DMACSoftBReq</a>;
<a name="l00761"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ae8034553a3c3c6bfaec53a07c9aa9b74">00761</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ae8034553a3c3c6bfaec53a07c9aa9b74">DMACSoftSReq</a>;
<a name="l00762"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a480687100c43187a4b86ba87b6eb494c">00762</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a480687100c43187a4b86ba87b6eb494c">DMACSoftLBReq</a>;
<a name="l00763"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a580306b5b2109c49dd6be3009a360559">00763</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a580306b5b2109c49dd6be3009a360559">DMACSoftLSReq</a>;
<a name="l00764"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ae338d90b22df63aa0f346ec864e87cc6">00764</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#ae338d90b22df63aa0f346ec864e87cc6">DMACConfig</a>;
<a name="l00765"></a><a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a7f32a90d23582dccffefe4f5b46fa841">00765</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html#a7f32a90d23582dccffefe4f5b46fa841">DMACSync</a>;
<a name="l00766"></a>00766 } <a class="code" href="struct_l_p_c___g_p_d_m_a___type_def.html" title="General Purpose Direct Memory Access (GPDMA) register structure definition.">LPC_GPDMA_TypeDef</a>;
<a name="l00767"></a>00767 
<a name="l00769"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html">00769</a> <span class="keyword">typedef</span> <span class="keyword">struct                          </span><span class="comment">/* Channel Registers                  */</span>
<a name="l00770"></a>00770 {
<a name="l00771"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a6b0842b5ab5e43501d684f874cd5ad79">00771</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a6b0842b5ab5e43501d684f874cd5ad79">DMACCSrcAddr</a>;
<a name="l00772"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#aba94af16ce1285f05c7045f29987fd30">00772</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#aba94af16ce1285f05c7045f29987fd30">DMACCDestAddr</a>;
<a name="l00773"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#abeb9b41622d5ef0b5be547eddae122ff">00773</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#abeb9b41622d5ef0b5be547eddae122ff">DMACCLLI</a>;
<a name="l00774"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a419bf2ba47ac187f8ba16b2294675783">00774</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a419bf2ba47ac187f8ba16b2294675783">DMACCControl</a>;
<a name="l00775"></a><a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a6775b0feebee7bb90a05bb649c331c9d">00775</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html#a6775b0feebee7bb90a05bb649c331c9d">DMACCConfig</a>;
<a name="l00776"></a>00776 } <a class="code" href="struct_l_p_c___g_p_d_m_a_c_h___type_def.html" title="General Purpose Direct Memory Access Channel (GPDMACH) register structure definition.">LPC_GPDMACH_TypeDef</a>;
<a name="l00777"></a>00777 
<a name="l00778"></a>00778 <span class="comment">/*------------- Universal Serial Bus (USB) -----------------------------------*/</span>
<a name="l00780"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html">00780</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00781"></a>00781 {
<a name="l00782"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ab4cb8ca993360c98c526a6ce0993447b">00782</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ab4cb8ca993360c98c526a6ce0993447b">HcRevision</a>;             <span class="comment">/* USB Host Registers                 */</span>
<a name="l00783"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aee9520d95e11e8e4a78088f520f5c422">00783</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aee9520d95e11e8e4a78088f520f5c422">HcControl</a>;
<a name="l00784"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae2f31d6f5db9c3b8d61528cc2cecdacd">00784</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae2f31d6f5db9c3b8d61528cc2cecdacd">HcCommandStatus</a>;
<a name="l00785"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ac30d5237ce970b8b5bc180d513f2e418">00785</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ac30d5237ce970b8b5bc180d513f2e418">HcInterruptStatus</a>;
<a name="l00786"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1f5a30ab60ce6b78e18b0b65533b505c">00786</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1f5a30ab60ce6b78e18b0b65533b505c">HcInterruptEnable</a>;
<a name="l00787"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a043afee55e0d1e97e3ba4f5e0a54955e">00787</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a043afee55e0d1e97e3ba4f5e0a54955e">HcInterruptDisable</a>;
<a name="l00788"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8874334d1d615b125621ea5364e4045b">00788</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8874334d1d615b125621ea5364e4045b">HcHCCA</a>;
<a name="l00789"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#abab93a6db5786bbba84b9e08c36ac172">00789</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#abab93a6db5786bbba84b9e08c36ac172">HcPeriodCurrentED</a>;
<a name="l00790"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aa385be198ccf60d7291ea66055d59468">00790</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aa385be198ccf60d7291ea66055d59468">HcControlHeadED</a>;
<a name="l00791"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#af2837f8a8d2e6cef1f9f104c6f74121e">00791</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#af2837f8a8d2e6cef1f9f104c6f74121e">HcControlCurrentED</a>;
<a name="l00792"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae763ff2aec93c7f8edb6ffc49c3c6ab5">00792</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae763ff2aec93c7f8edb6ffc49c3c6ab5">HcBulkHeadED</a>;
<a name="l00793"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae0c6d7bc85f03346f119d52f7109c2f8">00793</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae0c6d7bc85f03346f119d52f7109c2f8">HcBulkCurrentED</a>;
<a name="l00794"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a5d10ef0a18aa32ab892309a6fb41dfed">00794</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a5d10ef0a18aa32ab892309a6fb41dfed">HcDoneHead</a>;
<a name="l00795"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae3de47fca39188d06951302543cad9e8">00795</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae3de47fca39188d06951302543cad9e8">HcFmInterval</a>;
<a name="l00796"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aa89a94a2c1b00e3a6837e7c96da37b49">00796</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aa89a94a2c1b00e3a6837e7c96da37b49">HcFmRemaining</a>;
<a name="l00797"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8c76b148cb52572faece5a9945d41da2">00797</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8c76b148cb52572faece5a9945d41da2">HcFmNumber</a>;
<a name="l00798"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aadb761d78b2f522d3ad7804ea981c46d">00798</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aadb761d78b2f522d3ad7804ea981c46d">HcPeriodicStart</a>;
<a name="l00799"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a881b454cf700e547fb5a517e4036b77e">00799</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a881b454cf700e547fb5a517e4036b77e">HcLSTreshold</a>;
<a name="l00800"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a37650c4aa3621a6022b03a5ea13968e6">00800</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a37650c4aa3621a6022b03a5ea13968e6">HcRhDescriptorA</a>;
<a name="l00801"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9bfb2e98b5f1ef612031622ba5be046e">00801</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9bfb2e98b5f1ef612031622ba5be046e">HcRhDescriptorB</a>;
<a name="l00802"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#acd601448d7a8a8095c82a15f8c3efb01">00802</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#acd601448d7a8a8095c82a15f8c3efb01">HcRhStatus</a>;
<a name="l00803"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ac55a2c10ccc48b722868cf4fcbf5c2a3">00803</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ac55a2c10ccc48b722868cf4fcbf5c2a3">HcRhPortStatus1</a>;
<a name="l00804"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a93c44cfb8512cfa0921ff84c6a145bea">00804</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a93c44cfb8512cfa0921ff84c6a145bea">HcRhPortStatus2</a>;
<a name="l00805"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a3ffead91ee6688b7de9fa6254fb49682">00805</a>        uint32_t RESERVED0[40];
<a name="l00806"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a176fed13e7e8206414da33c25196f377">00806</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a176fed13e7e8206414da33c25196f377">Module_ID</a>;
<a name="l00807"></a>00807 
<a name="l00808"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a7c9db97bfd4c122921ec7ba9f7bc4941">00808</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a7c9db97bfd4c122921ec7ba9f7bc4941">OTGIntSt</a>;               <span class="comment">/* USB On-The-Go Registers            */</span>
<a name="l00809"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8b37ad287873312dc775454d3dc3b609">00809</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8b37ad287873312dc775454d3dc3b609">OTGIntEn</a>;
<a name="l00810"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aac38a98038dd102c2e73c4b7ffb073ee">00810</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aac38a98038dd102c2e73c4b7ffb073ee">OTGIntSet</a>;
<a name="l00811"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#afe0d33392a9de619a6d45ed52a29a78e">00811</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#afe0d33392a9de619a6d45ed52a29a78e">OTGIntClr</a>;
<a name="l00812"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a68c3bbec0ec51a4c68d0579876636277">00812</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a68c3bbec0ec51a4c68d0579876636277">OTGStCtrl</a>;
<a name="l00813"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a424cd5c8e78ffef49a9419493adb195b">00813</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a424cd5c8e78ffef49a9419493adb195b">OTGTmr</a>;
<a name="l00814"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a3777d3201cab447ed87d1afd8a244a49">00814</a>        uint32_t RESERVED1[58];
<a name="l00815"></a>00815 
<a name="l00816"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a022ae94b9cc8458829c8a8fbf19cb816">00816</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a022ae94b9cc8458829c8a8fbf19cb816">USBDevIntSt</a>;            <span class="comment">/* USB Device Interrupt Registers     */</span>
<a name="l00817"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#afb7d5e22bb3128a284ef18666b110277">00817</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#afb7d5e22bb3128a284ef18666b110277">USBDevIntEn</a>;
<a name="l00818"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a88e848ec834e3f778ca3997f1fd776d1">00818</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a88e848ec834e3f778ca3997f1fd776d1">USBDevIntClr</a>;
<a name="l00819"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2a2b7305637a2144638bb84aef5510be">00819</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2a2b7305637a2144638bb84aef5510be">USBDevIntSet</a>;
<a name="l00820"></a>00820 
<a name="l00821"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aca388aae6fb6a4327acd057354f1b8ed">00821</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aca388aae6fb6a4327acd057354f1b8ed">USBCmdCode</a>;             <span class="comment">/* USB Device SIE Command Registers   */</span>
<a name="l00822"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a330a8980d986998921bfca6656ac81c1">00822</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a330a8980d986998921bfca6656ac81c1">USBCmdData</a>;
<a name="l00823"></a>00823 
<a name="l00824"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9f10270afd699d714bf7c894d99f4086">00824</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9f10270afd699d714bf7c894d99f4086">USBRxData</a>;              <span class="comment">/* USB Device Transfer Registers      */</span>
<a name="l00825"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#aac02fa6c9e5a287e673390a8ec20d62c">00825</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#aac02fa6c9e5a287e673390a8ec20d62c">USBTxData</a>;
<a name="l00826"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a109cdf5c4b3b624eb5c4c7cc5d38e02a">00826</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a109cdf5c4b3b624eb5c4c7cc5d38e02a">USBRxPLen</a>;
<a name="l00827"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0b101b41d4764fd398f043d4ab3893ef">00827</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0b101b41d4764fd398f043d4ab3893ef">USBTxPLen</a>;
<a name="l00828"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9c537e084115ebf2f0e373d16ed04fed">00828</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9c537e084115ebf2f0e373d16ed04fed">USBCtrl</a>;
<a name="l00829"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4795e4e43878bea4d37bb1985e9b6cc1">00829</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4795e4e43878bea4d37bb1985e9b6cc1">USBDevIntPri</a>;
<a name="l00830"></a>00830 
<a name="l00831"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#af71fcc23403bcf4bd5920afb437536f4">00831</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#af71fcc23403bcf4bd5920afb437536f4">USBEpIntSt</a>;             <span class="comment">/* USB Device Endpoint Interrupt Regs */</span>
<a name="l00832"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#abea343099e457da7f6074d912fdde14f">00832</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#abea343099e457da7f6074d912fdde14f">USBEpIntEn</a>;
<a name="l00833"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ab4198791626dc19ec62cffcac41db7c9">00833</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ab4198791626dc19ec62cffcac41db7c9">USBEpIntClr</a>;
<a name="l00834"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae933d31a84179384f542814eb2e32737">00834</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#ae933d31a84179384f542814eb2e32737">USBEpIntSet</a>;
<a name="l00835"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#af7e3c0627ed429fb0501ba70722b48fd">00835</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#af7e3c0627ed429fb0501ba70722b48fd">USBEpIntPri</a>;
<a name="l00836"></a>00836 
<a name="l00837"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a01cebf641a555a88d40058ad3a78b245">00837</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a01cebf641a555a88d40058ad3a78b245">USBReEp</a>;                <span class="comment">/* USB Device Endpoint Realization Reg*/</span>
<a name="l00838"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a50234da15598d74fff75d5f9cd842f8f">00838</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a50234da15598d74fff75d5f9cd842f8f">USBEpInd</a>;
<a name="l00839"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a804d8c30e129ec47d91727c699f26c9f">00839</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a804d8c30e129ec47d91727c699f26c9f">USBMaxPSize</a>;
<a name="l00840"></a>00840 
<a name="l00841"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8808eaa1c3f62fe0dcc05d7102f390de">00841</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8808eaa1c3f62fe0dcc05d7102f390de">USBDMARSt</a>;              <span class="comment">/* USB Device DMA Registers           */</span>
<a name="l00842"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4fe987e91e2d34d3026d0ed2ed4edf15">00842</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4fe987e91e2d34d3026d0ed2ed4edf15">USBDMARClr</a>;
<a name="l00843"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0acc2ce6208a0735882782c3fafc13ce">00843</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0acc2ce6208a0735882782c3fafc13ce">USBDMARSet</a>;
<a name="l00844"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a6605052136eaca6d37ac949617ebf682">00844</a>        uint32_t RESERVED2[9];
<a name="l00845"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2a94993d8544189ab87c832fbd212db5">00845</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2a94993d8544189ab87c832fbd212db5">USBUDCAH</a>;
<a name="l00846"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#adcf1be8c041194f936f1f1394d8868ae">00846</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#adcf1be8c041194f936f1f1394d8868ae">USBEpDMASt</a>;
<a name="l00847"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8e11aceca00bf0514419a8bedf0bf981">00847</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8e11aceca00bf0514419a8bedf0bf981">USBEpDMAEn</a>;
<a name="l00848"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a5f0c5ec319f6427abeee5796280c4ce0">00848</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a5f0c5ec319f6427abeee5796280c4ce0">USBEpDMADis</a>;
<a name="l00849"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9ae42b7b2506a6008e72a7378919bb1a">00849</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9ae42b7b2506a6008e72a7378919bb1a">USBDMAIntSt</a>;
<a name="l00850"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0acec2887cfa0fc497c5171ee2d9fb2a">00850</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a0acec2887cfa0fc497c5171ee2d9fb2a">USBDMAIntEn</a>;
<a name="l00851"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#ac0643956b4c562e73ce34c9adeb10948">00851</a>        uint32_t RESERVED3[2];
<a name="l00852"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9e07944472014534f1f3195122c19e06">00852</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a9e07944472014534f1f3195122c19e06">USBEoTIntSt</a>;
<a name="l00853"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1a430f6ca3e29ceda0e120d38a701c70">00853</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1a430f6ca3e29ceda0e120d38a701c70">USBEoTIntClr</a>;
<a name="l00854"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a42d56d7eecd42ce9ff95f0560124c868">00854</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a42d56d7eecd42ce9ff95f0560124c868">USBEoTIntSet</a>;
<a name="l00855"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a550a2755cae2b0827911feec9e6cef26">00855</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a550a2755cae2b0827911feec9e6cef26">USBNDDRIntSt</a>;
<a name="l00856"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a796e70106d5ac8eb55a01f04e0ad2da1">00856</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a796e70106d5ac8eb55a01f04e0ad2da1">USBNDDRIntClr</a>;
<a name="l00857"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a38ae0580980303f1e8e514fbd4535e5a">00857</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a38ae0580980303f1e8e514fbd4535e5a">USBNDDRIntSet</a>;
<a name="l00858"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#adea3893da02fe4827be41259426d4fbb">00858</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#adea3893da02fe4827be41259426d4fbb">USBSysErrIntSt</a>;
<a name="l00859"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a73d94207bb80c81961e07c42a27354eb">00859</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a73d94207bb80c81961e07c42a27354eb">USBSysErrIntClr</a>;
<a name="l00860"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4feffa8a85fc017ac3e66905480b1381">00860</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a4feffa8a85fc017ac3e66905480b1381">USBSysErrIntSet</a>;
<a name="l00861"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a194b0f2ab1387cf0b6700520cb37d250">00861</a>        uint32_t RESERVED4[15];
<a name="l00862"></a>00862 
<a name="l00863"></a>00863   <span class="keyword">union </span>{
<a name="l00864"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2415dd175f2a4a138bcf7ecb48c87ea8">00864</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a2415dd175f2a4a138bcf7ecb48c87ea8">I2C_RX</a>;                 <span class="comment">/* USB OTG I2C Registers              */</span>
<a name="l00865"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1ce2333d6939b16e01ae70701292d859">00865</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a1ce2333d6939b16e01ae70701292d859">I2C_TX</a>;
<a name="l00866"></a>00866   };
<a name="l00867"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8ca4754023cd7192fdc8831db2210e69">00867</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a8ca4754023cd7192fdc8831db2210e69">I2C_STS</a>;
<a name="l00868"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a92fec1e145982abc9ff024b219e6fb2e">00868</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a92fec1e145982abc9ff024b219e6fb2e">I2C_CTL</a>;
<a name="l00869"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a94597e6f93b262f756f69b1da8f59b0b">00869</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a94597e6f93b262f756f69b1da8f59b0b">I2C_CLKHI</a>;
<a name="l00870"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#acdaf7ed33da461f2f44052b784bd423d">00870</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#acdaf7ed33da461f2f44052b784bd423d">I2C_CLKLO</a>;
<a name="l00871"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a38fffd43fba34b2ceafb5e8dea2d8f0d">00871</a>        uint32_t RESERVED5[824];
<a name="l00872"></a>00872 
<a name="l00873"></a>00873   <span class="keyword">union </span>{
<a name="l00874"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a7bb4b518a350b4c2b4790b7696e56ab0">00874</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a7bb4b518a350b4c2b4790b7696e56ab0">USBClkCtrl</a>;             <span class="comment">/* USB Clock Control Registers        */</span>
<a name="l00875"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#af3128ce35e337d8689b02408b30b7dcf">00875</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#af3128ce35e337d8689b02408b30b7dcf">OTGClkCtrl</a>;
<a name="l00876"></a>00876   };
<a name="l00877"></a>00877   <span class="keyword">union </span>{
<a name="l00878"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#a36f0b523e1ccf888c2f7dc2479c83d33">00878</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#a36f0b523e1ccf888c2f7dc2479c83d33">USBClkSt</a>;
<a name="l00879"></a><a class="code" href="struct_l_p_c___u_s_b___type_def.html#abd4cda78939aeba9824fc5a8bf1cadcc">00879</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___u_s_b___type_def.html#abd4cda78939aeba9824fc5a8bf1cadcc">OTGClkSt</a>;
<a name="l00880"></a>00880   };
<a name="l00881"></a>00881 } <a class="code" href="struct_l_p_c___u_s_b___type_def.html" title="Universal Serial Bus (USB) register structure definition.">LPC_USB_TypeDef</a>;
<a name="l00882"></a>00882 
<a name="l00883"></a>00883 <span class="comment">/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/</span>
<a name="l00885"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html">00885</a> <span class="keyword">typedef</span> <span class="keyword">struct</span>
<a name="l00886"></a>00886 {
<a name="l00887"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab5156c31743f4789fd10310200d8d2bf">00887</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab5156c31743f4789fd10310200d8d2bf">MAC1</a>;                   <span class="comment">/* MAC Registers                      */</span>
<a name="l00888"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a7a8f40e4ac7644964cf3c9de45ad7e9e">00888</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a7a8f40e4ac7644964cf3c9de45ad7e9e">MAC2</a>;
<a name="l00889"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2e0b886d608716edd0d05e9056ad6aca">00889</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2e0b886d608716edd0d05e9056ad6aca">IPGT</a>;
<a name="l00890"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a98ca5496fcb495c925d4a6429c48923d">00890</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a98ca5496fcb495c925d4a6429c48923d">IPGR</a>;
<a name="l00891"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a3892dc5feb00ab5bb78954b83ae642c8">00891</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a3892dc5feb00ab5bb78954b83ae642c8">CLRT</a>;
<a name="l00892"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4dbac18bf1bf0a94bea71396039f6d80">00892</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4dbac18bf1bf0a94bea71396039f6d80">MAXF</a>;
<a name="l00893"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a36c57fffa4599db2b827a6a6487c4a8e">00893</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a36c57fffa4599db2b827a6a6487c4a8e">SUPP</a>;
<a name="l00894"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2248f0f7143f009c0b54253379af0401">00894</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2248f0f7143f009c0b54253379af0401">TEST</a>;
<a name="l00895"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a1b04c1855f4e234e32e3585957d6fdd6">00895</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a1b04c1855f4e234e32e3585957d6fdd6">MCFG</a>;
<a name="l00896"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#abae8b7a2fa744e107305e18e76e670ad">00896</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#abae8b7a2fa744e107305e18e76e670ad">MCMD</a>;
<a name="l00897"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a342c49fb17b2e947ae1437703df2c789">00897</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a342c49fb17b2e947ae1437703df2c789">MADR</a>;
<a name="l00898"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a864c6debdadd7b63029419844903f5e6">00898</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a864c6debdadd7b63029419844903f5e6">MWTD</a>;
<a name="l00899"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2c7946eb80879a6a6f7e95eadaf68d23">00899</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2c7946eb80879a6a6f7e95eadaf68d23">MRDD</a>;
<a name="l00900"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ad86de9433d28b70580dcc82d73052965">00900</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ad86de9433d28b70580dcc82d73052965">MIND</a>;
<a name="l00901"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a68183d735e797151da21c7c09221b9a2">00901</a>        uint32_t RESERVED0[2];
<a name="l00902"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#adf4683f69c1e3683a74ffcdc602c83ad">00902</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#adf4683f69c1e3683a74ffcdc602c83ad">SA0</a>;
<a name="l00903"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a5cbcc912368e07ff62c44826dc475997">00903</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a5cbcc912368e07ff62c44826dc475997">SA1</a>;
<a name="l00904"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab99656dce8acc6f65ef08e2cbe65f331">00904</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab99656dce8acc6f65ef08e2cbe65f331">SA2</a>;
<a name="l00905"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a3dd6696e78118b644b30f0565e795153">00905</a>        uint32_t RESERVED1[45];
<a name="l00906"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a3df51d7a5d5a636f8a2326b898068b60">00906</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a3df51d7a5d5a636f8a2326b898068b60">Command</a>;                <span class="comment">/* Control Registers                  */</span>
<a name="l00907"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aae5b85680364d8461be30a3f694e7f8d">00907</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aae5b85680364d8461be30a3f694e7f8d">Status</a>;
<a name="l00908"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a92352b9d2b4eb676056278092e38703b">00908</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a92352b9d2b4eb676056278092e38703b">RxDescriptor</a>;
<a name="l00909"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a58908e592935b316a6c76cf369a9faa9">00909</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a58908e592935b316a6c76cf369a9faa9">RxStatus</a>;
<a name="l00910"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a6b9ed171d0920b035ee2ecafce2d9da9">00910</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a6b9ed171d0920b035ee2ecafce2d9da9">RxDescriptorNumber</a>;
<a name="l00911"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a43dc7e58f5c594fe1127acbdd0377117">00911</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a43dc7e58f5c594fe1127acbdd0377117">RxProduceIndex</a>;
<a name="l00912"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab5fffdfa1778cbf5ad300a885edeb3a7">00912</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ab5fffdfa1778cbf5ad300a885edeb3a7">RxConsumeIndex</a>;
<a name="l00913"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a04bc6f35b5ab39f68e161f280a209586">00913</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a04bc6f35b5ab39f68e161f280a209586">TxDescriptor</a>;
<a name="l00914"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a09f0f47c4ff9e7562919c41a240f7b06">00914</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a09f0f47c4ff9e7562919c41a240f7b06">TxStatus</a>;
<a name="l00915"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#afda16f458962b80ba3ce19f78c19fae5">00915</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#afda16f458962b80ba3ce19f78c19fae5">TxDescriptorNumber</a>;
<a name="l00916"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4f9658380a6575205bb4425266d2f40c">00916</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4f9658380a6575205bb4425266d2f40c">TxProduceIndex</a>;
<a name="l00917"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aad539d6d45242eed0f081a25242c5c4d">00917</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aad539d6d45242eed0f081a25242c5c4d">TxConsumeIndex</a>;
<a name="l00918"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a52218680140b6414e1170ed325f4959a">00918</a>        uint32_t RESERVED2[10];
<a name="l00919"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ae97b75b837ac7226171c6527a516063e">00919</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ae97b75b837ac7226171c6527a516063e">TSV0</a>;
<a name="l00920"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a96c640eb53e29a0912cff17fc85d4182">00920</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a96c640eb53e29a0912cff17fc85d4182">TSV1</a>;
<a name="l00921"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aa5b56072607b4bb97725a1d975e5238e">00921</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aa5b56072607b4bb97725a1d975e5238e">RSV</a>;
<a name="l00922"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2e4c85d75b7f788af4487d21b1164654">00922</a>        uint32_t RESERVED3[3];
<a name="l00923"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aafb5ee27f72bcdc4bddcf3316cfa7fe2">00923</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aafb5ee27f72bcdc4bddcf3316cfa7fe2">FlowControlCounter</a>;
<a name="l00924"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aeaba186aa28630379a522ce9fcce07bc">00924</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aeaba186aa28630379a522ce9fcce07bc">FlowControlStatus</a>;
<a name="l00925"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a7728a5be321ecf1e065d1747b970dd6f">00925</a>        uint32_t RESERVED4[34];
<a name="l00926"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aab1552a2d8a471a3fa7b24827cdd1cd4">00926</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aab1552a2d8a471a3fa7b24827cdd1cd4">RxFilterCtrl</a>;           <span class="comment">/* Rx Filter Registers                */</span>
<a name="l00927"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ac66f89acb20e270d4f39a1d9e18101d7">00927</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ac66f89acb20e270d4f39a1d9e18101d7">RxFilterWoLStatus</a>;
<a name="l00928"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2c399fd856451eb1eeb2f5584c51f0e6">00928</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a2c399fd856451eb1eeb2f5584c51f0e6">RxFilterWoLClear</a>;
<a name="l00929"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a88e7d8200edf2262d802d9bf72540e04">00929</a>        uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a88e7d8200edf2262d802d9bf72540e04">RESERVED5</a>;
<a name="l00930"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a32834be73d125ac39cf2061c2d88d98b">00930</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a32834be73d125ac39cf2061c2d88d98b">HashFilterL</a>;
<a name="l00931"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a1ef2410e1589f96115cc8213173824d6">00931</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a1ef2410e1589f96115cc8213173824d6">HashFilterH</a>;
<a name="l00932"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#ac3167b43a414e404f8d79b96b692ef8b">00932</a>        uint32_t RESERVED6[882];
<a name="l00933"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aa2fa174ad6318c4352267f0d49ddce6a">00933</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaf63697ed9952cc71e1225efe205f6cd3">__I</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aa2fa174ad6318c4352267f0d49ddce6a">IntStatus</a>;              <span class="comment">/* Module Control Registers           */</span>
<a name="l00934"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aae7535bb7e025e32b0dd634680913213">00934</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aae7535bb7e025e32b0dd634680913213">IntEnable</a>;
<a name="l00935"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4be5453f5e9866cf8067e190439b80fa">00935</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a4be5453f5e9866cf8067e190439b80fa">IntClear</a>;
<a name="l00936"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a76b7ff34fd56db18a9d0bb47b20b55a3">00936</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#ga7e25d9380f9ef903923964322e71f2f6">__O</a>  uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a76b7ff34fd56db18a9d0bb47b20b55a3">IntSet</a>;
<a name="l00937"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a91dcc4dff1677e792e16381b8b57b9a0">00937</a>        uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a91dcc4dff1677e792e16381b8b57b9a0">RESERVED7</a>;
<a name="l00938"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a190ca847cc0ab8f900f1180f97e85254">00938</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a190ca847cc0ab8f900f1180f97e85254">PowerDown</a>;
<a name="l00939"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aed02e29f91e849b6a7d56697228a93c2">00939</a>        uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#aed02e29f91e849b6a7d56697228a93c2">RESERVED8</a>;
<a name="l00940"></a><a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a6ae4eea16f2d300e30ea89eb6f780ca5">00940</a>   <a class="code" href="group___c_m_s_i_s___c_m3__core__definitions.html#gaec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html#a6ae4eea16f2d300e30ea89eb6f780ca5">Module_ID</a>;
<a name="l00941"></a>00941 } <a class="code" href="struct_l_p_c___e_m_a_c___type_def.html" title="Ethernet Media Access Controller (EMAC) register structure definition.">LPC_EMAC_TypeDef</a>;
<a name="l00942"></a>00942 
<a name="l00943"></a>00943 
<a name="l00944"></a>00944 <span class="preprocessor">#if defined ( __CC_ARM   )</span>
<a name="l00945"></a>00945 <span class="preprocessor"></span><span class="preprocessor">#pragma no_anon_unions</span>
<a name="l00946"></a>00946 <span class="preprocessor"></span><span class="preprocessor">#endif</span>
<a name="l00947"></a>00947 <span class="preprocessor"></span>
<a name="l00948"></a>00948 
<a name="l00949"></a>00949 <span class="comment">/******************************************************************************/</span>
<a name="l00950"></a>00950 <span class="comment">/*                         Peripheral memory map                              */</span>
<a name="l00951"></a>00951 <span class="comment">/******************************************************************************/</span>
<a name="l00952"></a>00952 <span class="comment">/* Base addresses                                                             */</span>
<a name="l00953"></a><a class="code" href="group___l_p_c17xx___system.html#ga7d7417b6cd6c6975fa03de03920d27e8">00953</a> <span class="preprocessor">#define LPC_FLASH_BASE        (0x00000000UL)</span>
<a name="l00954"></a><a class="code" href="group___l_p_c17xx___system.html#ga9782814ad6434f200b65440d2ac01c2a">00954</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_RAM_BASE          (0x10000000UL)</span>
<a name="l00955"></a>00955 <span class="preprocessor"></span><span class="preprocessor">#ifdef __LPC17XX_REV00</span>
<a name="l00956"></a>00956 <span class="preprocessor"></span><span class="preprocessor">#define LPC_AHBRAM0_BASE      (0x20000000UL)</span>
<a name="l00957"></a>00957 <span class="preprocessor"></span><span class="preprocessor">#define LPC_AHBRAM1_BASE      (0x20004000UL)</span>
<a name="l00958"></a>00958 <span class="preprocessor"></span><span class="preprocessor">#else</span>
<a name="l00959"></a><a class="code" href="group___l_p_c17xx___system.html#ga3364e6e629d92b647ead5b64146ca383">00959</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_AHBRAM0_BASE      (0x2007C000UL)</span>
<a name="l00960"></a><a class="code" href="group___l_p_c17xx___system.html#gac4e369c1f5ce40107b7ea38cbd012592">00960</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_AHBRAM1_BASE      (0x20080000UL)</span>
<a name="l00961"></a>00961 <span class="preprocessor"></span><span class="preprocessor">#endif</span>
<a name="l00962"></a><a class="code" href="group___l_p_c17xx___system.html#ga5feb4a6692784a25eaed627661bd8f36">00962</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO_BASE         (0x2009C000UL)</span>
<a name="l00963"></a><a class="code" href="group___l_p_c17xx___system.html#ga55cab996c3594a0f4cc459ec8e10daea">00963</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_APB0_BASE         (0x40000000UL)</span>
<a name="l00964"></a><a class="code" href="group___l_p_c17xx___system.html#ga0be6ea6a9e30a53b98bbff6502ea59dc">00964</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_APB1_BASE         (0x40080000UL)</span>
<a name="l00965"></a><a class="code" href="group___l_p_c17xx___system.html#ga8e0d25ffe3428ed27f963e83089046a8">00965</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_AHB_BASE          (0x50000000UL)</span>
<a name="l00966"></a><a class="code" href="group___l_p_c17xx___system.html#gaa42e7b1f24aad42d5102e3efcaee6bfa">00966</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CM3_BASE          (0xE0000000UL)</span>
<a name="l00967"></a>00967 <span class="preprocessor"></span>
<a name="l00968"></a>00968 <span class="comment">/* APB0 peripherals                                                           */</span>
<a name="l00969"></a><a class="code" href="group___l_p_c17xx___system.html#ga02a30b0be4672972c3af9e5aebdcfea1">00969</a> <span class="preprocessor">#define LPC_WDT_BASE          (LPC_APB0_BASE + 0x00000)</span>
<a name="l00970"></a><a class="code" href="group___l_p_c17xx___system.html#ga1700e34b157bbb09165bb65d63df2032">00970</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM0_BASE         (LPC_APB0_BASE + 0x04000)</span>
<a name="l00971"></a><a class="code" href="group___l_p_c17xx___system.html#ga0ea4655a35b46532f1811d8a1cbe66ab">00971</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM1_BASE         (LPC_APB0_BASE + 0x08000)</span>
<a name="l00972"></a><a class="code" href="group___l_p_c17xx___system.html#gaa96fb70405a1298b350fc6f0ad0af997">00972</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART0_BASE        (LPC_APB0_BASE + 0x0C000)</span>
<a name="l00973"></a><a class="code" href="group___l_p_c17xx___system.html#ga18e8f96b25e3f343bdd7ba552ae7a617">00973</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART1_BASE        (LPC_APB0_BASE + 0x10000)</span>
<a name="l00974"></a><a class="code" href="group___l_p_c17xx___system.html#gabb885bd92b4a003b94dc27c4700818bb">00974</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_PWM1_BASE         (LPC_APB0_BASE + 0x18000)</span>
<a name="l00975"></a><a class="code" href="group___l_p_c17xx___system.html#gab4476c9e874621194369f74fcf26ce92">00975</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C0_BASE         (LPC_APB0_BASE + 0x1C000)</span>
<a name="l00976"></a><a class="code" href="group___l_p_c17xx___system.html#gaf611188188574ba805b6de71acc88c6c">00976</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SPI_BASE          (LPC_APB0_BASE + 0x20000)</span>
<a name="l00977"></a><a class="code" href="group___l_p_c17xx___system.html#ga4618213cf968f8245814d7d3e7aa2e2e">00977</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_RTC_BASE          (LPC_APB0_BASE + 0x24000)</span>
<a name="l00978"></a><a class="code" href="group___l_p_c17xx___system.html#gadf88491f4b83b5af99eaf30778cb62fa">00978</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIOINT_BASE      (LPC_APB0_BASE + 0x28080)</span>
<a name="l00979"></a><a class="code" href="group___l_p_c17xx___system.html#gaf4bd6baff731c0a23231ad37e133d705">00979</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_PINCON_BASE       (LPC_APB0_BASE + 0x2C000)</span>
<a name="l00980"></a><a class="code" href="group___l_p_c17xx___system.html#ga05d118997f53f596d3a087f8b91a1969">00980</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SSP1_BASE         (LPC_APB0_BASE + 0x30000)</span>
<a name="l00981"></a><a class="code" href="group___l_p_c17xx___system.html#ga2396e0d0c565e4c1c3b2fc593bd6c37f">00981</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_ADC_BASE          (LPC_APB0_BASE + 0x34000)</span>
<a name="l00982"></a><a class="code" href="group___l_p_c17xx___system.html#ga9d4f2bac61e26b32ad64d62f2be50e49">00982</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANAF_RAM_BASE    (LPC_APB0_BASE + 0x38000)</span>
<a name="l00983"></a><a class="code" href="group___l_p_c17xx___system.html#gabc6943f9e943d63ecf4e236b4ce7c344">00983</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANAF_BASE        (LPC_APB0_BASE + 0x3C000)</span>
<a name="l00984"></a><a class="code" href="group___l_p_c17xx___system.html#gac22b88e108d620661add143c174f8f11">00984</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANCR_BASE        (LPC_APB0_BASE + 0x40000)</span>
<a name="l00985"></a><a class="code" href="group___l_p_c17xx___system.html#gaf2407c1927ebddd767832aefa74c3398">00985</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CAN1_BASE         (LPC_APB0_BASE + 0x44000)</span>
<a name="l00986"></a><a class="code" href="group___l_p_c17xx___system.html#gab9608b3b72dd843a25910dd2a809106b">00986</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CAN2_BASE         (LPC_APB0_BASE + 0x48000)</span>
<a name="l00987"></a><a class="code" href="group___l_p_c17xx___system.html#gae59f73cf24ff126be3b9a8b921926676">00987</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C1_BASE         (LPC_APB0_BASE + 0x5C000)</span>
<a name="l00988"></a>00988 <span class="preprocessor"></span>
<a name="l00989"></a>00989 <span class="comment">/* APB1 peripherals                                                           */</span>
<a name="l00990"></a><a class="code" href="group___l_p_c17xx___system.html#ga53fb1af80b541545988f2a966681abfd">00990</a> <span class="preprocessor">#define LPC_SSP0_BASE         (LPC_APB1_BASE + 0x08000)</span>
<a name="l00991"></a><a class="code" href="group___l_p_c17xx___system.html#ga3bbaedad584252212d4704bb419489f6">00991</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_DAC_BASE          (LPC_APB1_BASE + 0x0C000)</span>
<a name="l00992"></a><a class="code" href="group___l_p_c17xx___system.html#gaf2375790bfdbe5e09c34321cf20d8bcc">00992</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM2_BASE         (LPC_APB1_BASE + 0x10000)</span>
<a name="l00993"></a><a class="code" href="group___l_p_c17xx___system.html#ga4a15d8a4becdf0dd64a7e2fc01d9f4d3">00993</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM3_BASE         (LPC_APB1_BASE + 0x14000)</span>
<a name="l00994"></a><a class="code" href="group___l_p_c17xx___system.html#ga8c3873ab74db743465b038c74b365281">00994</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART2_BASE        (LPC_APB1_BASE + 0x18000)</span>
<a name="l00995"></a><a class="code" href="group___l_p_c17xx___system.html#gac8dc517d5e03d4ca7666c18c89d5052e">00995</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART3_BASE        (LPC_APB1_BASE + 0x1C000)</span>
<a name="l00996"></a><a class="code" href="group___l_p_c17xx___system.html#ga00796bd1f1fa200bbffcd9e7e8679eaa">00996</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C2_BASE         (LPC_APB1_BASE + 0x20000)</span>
<a name="l00997"></a><a class="code" href="group___l_p_c17xx___system.html#gacff8b54e3924910d381e6b8ba804050c">00997</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2S_BASE          (LPC_APB1_BASE + 0x28000)</span>
<a name="l00998"></a><a class="code" href="group___l_p_c17xx___system.html#ga52453209af89a83df47df77d262d9ab8">00998</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_RIT_BASE          (LPC_APB1_BASE + 0x30000)</span>
<a name="l00999"></a><a class="code" href="group___l_p_c17xx___system.html#gad8a41dc802e3ea0ba9457d42a6927c03">00999</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_MCPWM_BASE        (LPC_APB1_BASE + 0x38000)</span>
<a name="l01000"></a><a class="code" href="group___l_p_c17xx___system.html#ga80fa25b18324c10c8e5c26893e6f0a67">01000</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_QEI_BASE          (LPC_APB1_BASE + 0x3C000)</span>
<a name="l01001"></a><a class="code" href="group___l_p_c17xx___system.html#gadb3d235d9617660037e1115ee0ad2c3a">01001</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SC_BASE           (LPC_APB1_BASE + 0x7C000)</span>
<a name="l01002"></a>01002 <span class="preprocessor"></span>
<a name="l01003"></a>01003 <span class="comment">/* AHB peripherals                                                            */</span>
<a name="l01004"></a><a class="code" href="group___l_p_c17xx___system.html#gaab3f5a2a26c956606a43fc437007aec6">01004</a> <span class="preprocessor">#define LPC_EMAC_BASE         (LPC_AHB_BASE  + 0x00000)</span>
<a name="l01005"></a><a class="code" href="group___l_p_c17xx___system.html#ga51ba8e3f33730fa2b78be3f892d8c278">01005</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMA_BASE        (LPC_AHB_BASE  + 0x04000)</span>
<a name="l01006"></a><a class="code" href="group___l_p_c17xx___system.html#ga08781dde70e77f12630a885aeb555aaf">01006</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH0_BASE     (LPC_AHB_BASE  + 0x04100)</span>
<a name="l01007"></a><a class="code" href="group___l_p_c17xx___system.html#gafef63f5c3c6c206c3f3295ba3abf303a">01007</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH1_BASE     (LPC_AHB_BASE  + 0x04120)</span>
<a name="l01008"></a><a class="code" href="group___l_p_c17xx___system.html#ga1c607916ebf4fa23ddefd37675366b5d">01008</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH2_BASE     (LPC_AHB_BASE  + 0x04140)</span>
<a name="l01009"></a><a class="code" href="group___l_p_c17xx___system.html#ga85913a69e6267017d35d98b24b9c5aee">01009</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH3_BASE     (LPC_AHB_BASE  + 0x04160)</span>
<a name="l01010"></a><a class="code" href="group___l_p_c17xx___system.html#ga7daad69ecd947ed94b48e29f2bdbfdaf">01010</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH4_BASE     (LPC_AHB_BASE  + 0x04180)</span>
<a name="l01011"></a><a class="code" href="group___l_p_c17xx___system.html#ga20fdee18f2ce4126747d597f98eeb4c9">01011</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH5_BASE     (LPC_AHB_BASE  + 0x041A0)</span>
<a name="l01012"></a><a class="code" href="group___l_p_c17xx___system.html#gab4f5fa13ccc2c91d5d9ef48916e6b34c">01012</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH6_BASE     (LPC_AHB_BASE  + 0x041C0)</span>
<a name="l01013"></a><a class="code" href="group___l_p_c17xx___system.html#gaf8515b7ffd05d964f79b0a287f861c9f">01013</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH7_BASE     (LPC_AHB_BASE  + 0x041E0)</span>
<a name="l01014"></a><a class="code" href="group___l_p_c17xx___system.html#gaa619008881e9f76dc31131313eff1b79">01014</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_USB_BASE          (LPC_AHB_BASE  + 0x0C000)</span>
<a name="l01015"></a>01015 <span class="preprocessor"></span>
<a name="l01016"></a>01016 <span class="comment">/* GPIOs                                                                      */</span>
<a name="l01017"></a><a class="code" href="group___l_p_c17xx___system.html#ga09e0e964ea1abf3b991772df2aa52405">01017</a> <span class="preprocessor">#define LPC_GPIO0_BASE        (LPC_GPIO_BASE + 0x00000)</span>
<a name="l01018"></a><a class="code" href="group___l_p_c17xx___system.html#ga9fb0536853721a3073bd69d94d0b7ec2">01018</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO1_BASE        (LPC_GPIO_BASE + 0x00020)</span>
<a name="l01019"></a><a class="code" href="group___l_p_c17xx___system.html#gae5524b2d728167194033ec7a1841a36b">01019</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO2_BASE        (LPC_GPIO_BASE + 0x00040)</span>
<a name="l01020"></a><a class="code" href="group___l_p_c17xx___system.html#ga56c68c5326b521b3278a35f4d81369a9">01020</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO3_BASE        (LPC_GPIO_BASE + 0x00060)</span>
<a name="l01021"></a><a class="code" href="group___l_p_c17xx___system.html#gaa54352e7745932e78b56bcbc1d70fa21">01021</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO4_BASE        (LPC_GPIO_BASE + 0x00080)</span>
<a name="l01022"></a>01022 <span class="preprocessor"></span>
<a name="l01023"></a>01023 <span class="comment">/******************************************************************************/</span>
<a name="l01024"></a>01024 <span class="comment">/*                         Peripheral declaration                             */</span>
<a name="l01025"></a>01025 <span class="comment">/******************************************************************************/</span>
<a name="l01026"></a><a class="code" href="group___l_p_c17xx___system.html#gac01c7f61bb84ad209eec22ec5c05446d">01026</a> <span class="preprocessor">#define LPC_SC                ((LPC_SC_TypeDef        *) LPC_SC_BASE       )</span>
<a name="l01027"></a><a class="code" href="group___l_p_c17xx___system.html#ga92f3de6ff5cfd5b8c290696fad07b18a">01027</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO0             ((LPC_GPIO_TypeDef      *) LPC_GPIO0_BASE    )</span>
<a name="l01028"></a><a class="code" href="group___l_p_c17xx___system.html#ga335587dad4e6d0da56c1f3ad1c087d10">01028</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO1             ((LPC_GPIO_TypeDef      *) LPC_GPIO1_BASE    )</span>
<a name="l01029"></a><a class="code" href="group___l_p_c17xx___system.html#ga27a09e8c08f9e209c6af70b0a3c56b39">01029</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO2             ((LPC_GPIO_TypeDef      *) LPC_GPIO2_BASE    )</span>
<a name="l01030"></a><a class="code" href="group___l_p_c17xx___system.html#ga6e961eb01d0f1e61dd9b9d5979d2aafc">01030</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO3             ((LPC_GPIO_TypeDef      *) LPC_GPIO3_BASE    )</span>
<a name="l01031"></a><a class="code" href="group___l_p_c17xx___system.html#ga652a560a972d4edec8a67cd85ad4bd60">01031</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIO4             ((LPC_GPIO_TypeDef      *) LPC_GPIO4_BASE    )</span>
<a name="l01032"></a><a class="code" href="group___l_p_c17xx___system.html#ga7d68cf0829652bd8c1f837c697653c5f">01032</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_WDT               ((LPC_WDT_TypeDef       *) LPC_WDT_BASE      )</span>
<a name="l01033"></a><a class="code" href="group___l_p_c17xx___system.html#ga6002a8a8684b782ae7345834f6dcbf36">01033</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM0              ((LPC_TIM_TypeDef       *) LPC_TIM0_BASE     )</span>
<a name="l01034"></a><a class="code" href="group___l_p_c17xx___system.html#ga01fc9c608a87fe135cbe8799a3908119">01034</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM1              ((LPC_TIM_TypeDef       *) LPC_TIM1_BASE     )</span>
<a name="l01035"></a><a class="code" href="group___l_p_c17xx___system.html#ga459250a0031a3c6c45d033faf8a7a39a">01035</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM2              ((LPC_TIM_TypeDef       *) LPC_TIM2_BASE     )</span>
<a name="l01036"></a><a class="code" href="group___l_p_c17xx___system.html#ga12f449e7f05cf8ab3f066cf490335a87">01036</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_TIM3              ((LPC_TIM_TypeDef       *) LPC_TIM3_BASE     )</span>
<a name="l01037"></a><a class="code" href="group___l_p_c17xx___system.html#gafdf2cd2149b37f8021a1c19191f8ec50">01037</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_RIT               ((LPC_RIT_TypeDef       *) LPC_RIT_BASE      )</span>
<a name="l01038"></a><a class="code" href="group___l_p_c17xx___system.html#ga6ba29f0f9b8af2f72e303533185bcc82">01038</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART0             ((LPC_UART_TypeDef      *) LPC_UART0_BASE    )</span>
<a name="l01039"></a><a class="code" href="group___l_p_c17xx___system.html#ga83ea0dab4dcb7411c2e1de20050a4d2d">01039</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART1             ((LPC_UART1_TypeDef     *) LPC_UART1_BASE    )</span>
<a name="l01040"></a><a class="code" href="group___l_p_c17xx___system.html#gac8badf231948fc9216d416c71a34e924">01040</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART2             ((LPC_UART_TypeDef      *) LPC_UART2_BASE    )</span>
<a name="l01041"></a><a class="code" href="group___l_p_c17xx___system.html#ga61c2bf57d66b50108cdec6878f9e8ee5">01041</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )</span>
<a name="l01042"></a><a class="code" href="group___l_p_c17xx___system.html#ga6e400c5c011db85f452eb2fb4a1ee7c2">01042</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_PWM1              ((LPC_PWM_TypeDef       *) LPC_PWM1_BASE     )</span>
<a name="l01043"></a><a class="code" href="group___l_p_c17xx___system.html#ga14b6c56857e970a682a9bb22a0cb6716">01043</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C0              ((LPC_I2C_TypeDef       *) LPC_I2C0_BASE     )</span>
<a name="l01044"></a><a class="code" href="group___l_p_c17xx___system.html#gad6d6333e47875813be171cffef258837">01044</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C1              ((LPC_I2C_TypeDef       *) LPC_I2C1_BASE     )</span>
<a name="l01045"></a><a class="code" href="group___l_p_c17xx___system.html#ga6bcdaa0ab66f4e3d213a488b34055557">01045</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2C2              ((LPC_I2C_TypeDef       *) LPC_I2C2_BASE     )</span>
<a name="l01046"></a><a class="code" href="group___l_p_c17xx___system.html#ga1d2800cab1a50bdf99efe66d6028b663">01046</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_I2S               ((LPC_I2S_TypeDef       *) LPC_I2S_BASE      )</span>
<a name="l01047"></a><a class="code" href="group___l_p_c17xx___system.html#ga9b593f008d0061052e90a8865d702ce5">01047</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SPI               ((LPC_SPI_TypeDef       *) LPC_SPI_BASE      )</span>
<a name="l01048"></a><a class="code" href="group___l_p_c17xx___system.html#ga8303d3e5135b2a039f0dc5f93c194f78">01048</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_RTC               ((LPC_RTC_TypeDef       *) LPC_RTC_BASE      )</span>
<a name="l01049"></a><a class="code" href="group___l_p_c17xx___system.html#gaefe2f52407c1ce58395766dc760525b5">01049</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPIOINT           ((LPC_GPIOINT_TypeDef   *) LPC_GPIOINT_BASE  )</span>
<a name="l01050"></a><a class="code" href="group___l_p_c17xx___system.html#gae30bef900c4cccded0c66548b38591f9">01050</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_PINCON            ((LPC_PINCON_TypeDef    *) LPC_PINCON_BASE   )</span>
<a name="l01051"></a><a class="code" href="group___l_p_c17xx___system.html#gac213e0325a8e8a972bd2e0dd6ccf353c">01051</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SSP0              ((LPC_SSP_TypeDef       *) LPC_SSP0_BASE     )</span>
<a name="l01052"></a><a class="code" href="group___l_p_c17xx___system.html#ga09c4610ada1d9aa18913963cbd1a6e52">01052</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_SSP1              ((LPC_SSP_TypeDef       *) LPC_SSP1_BASE     )</span>
<a name="l01053"></a><a class="code" href="group___l_p_c17xx___system.html#gab6eaf639d3a1eec83583a9e11ab7336f">01053</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_ADC               ((LPC_ADC_TypeDef       *) LPC_ADC_BASE      )</span>
<a name="l01054"></a><a class="code" href="group___l_p_c17xx___system.html#ga5b94918e9ea326d84ab862a5d377903b">01054</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_DAC               ((LPC_DAC_TypeDef       *) LPC_DAC_BASE      )</span>
<a name="l01055"></a><a class="code" href="group___l_p_c17xx___system.html#gaf02b7bcdc41a045910b3f0bae8a8f4b0">01055</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANAF_RAM         ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE)</span>
<a name="l01056"></a><a class="code" href="group___l_p_c17xx___system.html#ga4f738c971938302f38d54e662c9f7774">01056</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANAF             ((LPC_CANAF_TypeDef     *) LPC_CANAF_BASE    )</span>
<a name="l01057"></a><a class="code" href="group___l_p_c17xx___system.html#gadc209557a5736e29149b96018056fc29">01057</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CANCR             ((LPC_CANCR_TypeDef     *) LPC_CANCR_BASE    )</span>
<a name="l01058"></a><a class="code" href="group___l_p_c17xx___system.html#ga2f006d6888921f8336dce504eb56f4aa">01058</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CAN1              ((LPC_CAN_TypeDef       *) LPC_CAN1_BASE     )</span>
<a name="l01059"></a><a class="code" href="group___l_p_c17xx___system.html#ga838776140ad5e0156715278f8bb0652d">01059</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_CAN2              ((LPC_CAN_TypeDef       *) LPC_CAN2_BASE     )</span>
<a name="l01060"></a><a class="code" href="group___l_p_c17xx___system.html#ga6fe8e415821195a786b3f0dc5e7fc9fa">01060</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_MCPWM             ((LPC_MCPWM_TypeDef     *) LPC_MCPWM_BASE    )</span>
<a name="l01061"></a><a class="code" href="group___l_p_c17xx___system.html#ga71347b58898f54f8e9f00a6c652c7d49">01061</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_QEI               ((LPC_QEI_TypeDef       *) LPC_QEI_BASE      )</span>
<a name="l01062"></a><a class="code" href="group___l_p_c17xx___system.html#ga75e74c74e4b52e53d56b9e13be2bc5b5">01062</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_EMAC              ((LPC_EMAC_TypeDef      *) LPC_EMAC_BASE     )</span>
<a name="l01063"></a><a class="code" href="group___l_p_c17xx___system.html#gaf9d4b843ddff8d08a27880f90e2dbf18">01063</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMA             ((LPC_GPDMA_TypeDef     *) LPC_GPDMA_BASE    )</span>
<a name="l01064"></a><a class="code" href="group___l_p_c17xx___system.html#ga026df42ac9515b2f8271e562a4d4f3ba">01064</a> <span class="preprocessor"></span><span class="preprocessor">#define DMAREQSEL             (*(__IO uint32_t *)  ( 0x4000C1C4))</span>
<a name="l01065"></a><a class="code" href="group___l_p_c17xx___system.html#ga1faf7af762ef1c89d7c9cca935fbfdb6">01065</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH0          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH0_BASE )</span>
<a name="l01066"></a><a class="code" href="group___l_p_c17xx___system.html#ga663e789f3e8396669882e7d338116a87">01066</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH1          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH1_BASE )</span>
<a name="l01067"></a><a class="code" href="group___l_p_c17xx___system.html#ga10facbb9af335faa6898e205715fe91a">01067</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH2          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH2_BASE )</span>
<a name="l01068"></a><a class="code" href="group___l_p_c17xx___system.html#gaa4f54bce7705a81c84a357cbfc4757ed">01068</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH3          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH3_BASE )</span>
<a name="l01069"></a><a class="code" href="group___l_p_c17xx___system.html#ga8571e9cf7175bae6faf7963a271f48d4">01069</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH4          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH4_BASE )</span>
<a name="l01070"></a><a class="code" href="group___l_p_c17xx___system.html#ga3037ac33f3f1cbfaa0623bd73085bd37">01070</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH5          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH5_BASE )</span>
<a name="l01071"></a><a class="code" href="group___l_p_c17xx___system.html#gafe18efb195eb0e8bf265b97bb4520848">01071</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH6          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH6_BASE )</span>
<a name="l01072"></a><a class="code" href="group___l_p_c17xx___system.html#ga53536fc136007bcb4dd9e9a0257bf4fa">01072</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_GPDMACH7          ((LPC_GPDMACH_TypeDef   *) LPC_GPDMACH7_BASE )</span>
<a name="l01073"></a><a class="code" href="group___l_p_c17xx___system.html#gae77538a7f3f4850715c95283e38b423f">01073</a> <span class="preprocessor"></span><span class="preprocessor">#define LPC_USB               ((LPC_USB_TypeDef       *) LPC_USB_BASE      )</span>
<a name="l01074"></a>01074 <span class="preprocessor"></span>
<a name="l01079"></a>01079 <span class="preprocessor">#endif  // __LPC17xx_H__</span>
</pre></div></div><!-- contents -->


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